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April 23, 2019  

 

transphormusa.com

TDHBG1200DC100_0v1 

 4 

TDHBG1200DC100 User Guide 

 

(a)

 

Buck mode 

 

(b)

 

Boost mode 

Figure 4. Supply and load connections for buck (a) and boost (b) configurations 

Figure 5 shows possible configurations for the gate-drive signals. In Figure 5(a), a single input from an external signal source is 

used together with the on-board pulse generation circuit. J4 is used, J6 is left open circuit. Jumpers JP1 and JP2 are in the top 

position, as shown. If the high-side transistor is to be the active switch (e.g. buck mode), then the duty cycle of the input source 

should simply be set to the desired duty cycle (D). If the low-side transistor is to be the active switch (e.g. boost mode) the duty 

cycle of the input source should be set to (1-D), where D is the desired duty cycle of the low-side switch. This configuration 

results in synchronous rectification. If it is desired to let the device carrying the freewheeling current act as a diode, then the 

appropriate jumper should be placed so that the pull-down resistor is connected to the driver. Figure 5(b) shows a buck-mode 

TP65H070LDG 

TP65H070LSG 

TP65H070LDG 
 

TP65H070LSG 
 

Содержание TDHBG1200DC100

Страница 1: ...0V GaN FETs in the standard 8x8 PQFN package In either buck or boost mode the circuit can be configured for synchronous rectification Jumpers allow use of a single logic input or separate hi lo inputs...

Страница 2: ...age ports are provided which can serve as either input or output depending on the configuration boost or buck In either case one FET acts as the active power switch while the other carries the freewhe...

Страница 3: ...1 2kW When operating the board at high power 500W an external fan should be used to cool the heatsink on the daughtercard Configurations Figure 4 shows the basic power connections for buck and boost m...

Страница 4: ...ide transistor is to be the active switch e g buck mode then the duty cycle of the input source should simply be set to the desired duty cycle D If the low side transistor is to be the active switch e...

Страница 5: ...4 99k If a 50 signal source is used and 50 termination is desired then R5 and R6 may be replaced or paralleled with 1206 size 50 resistors Boost mode buck mode operation For buck mode operation A typi...

Страница 6: ...tor R4 connected to the DT input The dead time in ns is equal to the resistance in k x 10 so the default value of 12k corresponds to 120ns This will add to any dead time already present in the input s...

Страница 7: ...071KL Yageo C2 1 1u C EUC0805 CC0805ZRY5V8BB105 Yageo C3 1 2 2u C EUC0805 C2012X5R1E225K125AC TDK R13 1 2k R US_R0805 RC0805FR 072KL Yageo C5 C6 2 4 7n C EUC1206 C1206C472KDRACTU Kemet R5 R6 2 4 99K...

Страница 8: ...R6 R7 R11 R12 A126331CT ND 1 10uF C USC0805 C5 490 5523 1 ND 3 10uF C USC1206 C9 C11 C12 587 2259 1 ND 1 12k R US_R0603 R4 RMCF0603JT12K0CT ND 2 15 R US_R0603 RG1 RG2 P15GCT ND 2 15 R US_R1206 R8 R9...

Страница 9: ...April 23 2019 TDHBG1200DC100_0v1 TDHBG1200DC100 User Guide Figure 7a Detailed circuit schematic TDHBG1200DC100...

Страница 10: ...April 23 2019 TDHBG1200DC100_0v1 TDHBG1200DC100 User Guide Figure 7b Detailed circuit schematic TDHB 65H070 DC...

Страница 11: ...April 23 2019 TDHBG1200DC100_0v1 TDHBG1200DC100 User Guide a TDHBG1200DC100 PCB top layer b TDHBG1200DC100 PCB bottom layer...

Страница 12: ...April 23 2019 TDHBG1200DC100_0v1 TDHBG1200DC100 User Guide c TDHBG1200DC100 PCB inner layer 2 ground plane inner layer 3 power plane Figure 8 TDHBG1200DC100 PCB layers a TDHB 65H070L DC PCB top layer...

Страница 13: ...the low side gate pulse and half bridge switching node waveform In order to minimize inductance during measurement the tip and the ground of the probe should be directly attached to the sensing point...

Страница 14: ...100 duty cycle for the active low side switch Figure 10 Low inductance probing of fast high voltage signals Efficiency has been measured for this circuit in boost mode with 200Vdc in and 400Vdc out s...

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