TQ MBa8Xx, Руководство пользователя

Страница: 13 / 65

User's Manual l MBa8Xx UM 0100 l © 2020, TQ-Systems GmbH Page 8
3.1.2 TQMa8Xx pinout (continued)
Table 6: Pinout TQMa8Xx connector X1
Dir. Level Group Signal Pin Signal Group Level Dir.
– 0 V Ground GND 1 2 GND Ground 0 V –
O 1.8 V ( 1) ENET ENET1_REFCLK_OUT ( 2) 3 4 TEMP_EVENT# CONFIG – O
– 0 V Ground GND 5 6 GND Ground 0 V –
I 1.8 V
(1)
ENET ENET1_RXC
(2)
7 8 ENET1_TXC
(2)
ENET 1.8 V
(1)
O
– 0 V Ground GND 9 10 GND Ground 0 V –
I 1.8 V (1) ENET ENET1_RX_CTL (2) 11 12 ENET1_TX_CTL (2) ENET 1.8 V (1) O
I 1.8 V
(1)
ENET ENET1_RXD0
(2)
13 14 ENET1_TXD0
(2)
ENET 1.8 V
(1)
O
I 1.8 V (1) ENET ENET1_RXD1 (2) 15 16 ENET1_TXD1 (2) ENET 1.8 V (1) O
I 1.8 V (1) ENET ENET1_RXD2 (2) 17 18 ENET1_TXD2 (2) ENET 1.8 V (1) O
I 1.8 V
(1)
ENET ENET1_RXD3
(2)
19 20 ENET1_TXD3
(2)
ENET 1.8 V
(1)
O
– 0 V Ground GND 21 22 GND Ground 0 V –
I/O 1.8 V
( 3)
M4 GPIO M4_GPIO0_IO02 23 24 V_1V5_MPCIE_EN PCIe 1.8 V
(3)
O
I/O 1.8 V (3) M4 GPIO M4_GPIO0_IO03 25 26 V_3V3_MPCIE_EN PCIe 1.8 V (3) O
I/O 1.8 V
(3)
M4 I2C M4_I2C_SDA 27 28 LCD_CONTRAST DSI / LVDS 1.8 V
(3)
O
I/O 1.8 V
(3)
M4 I2C M4_I2C_SCL 29 30 PMIC_PGOOD CONFIG 1.8 V O
I 1.8 V CONFIG PMIC_WDI 31 32 GND Ground 0 V –
O 1.8 V
(3)
UART UART1_TX 33 34 SPI2_SCK SPI 1.8 V
(3)
O
I 1.8 V
(3)
UART UART1_RX 35 36 SPI2_SDO SPI 1.8 V
(3)
O
O 1.8 V (3) UART UART1_RTS# 37 38 SPI2_SDI SPI 1.8 V (3) I
I 1.8 V (3) UART UART1_CTS# 39 40 SPI2_CS0 SPI 1.8 V (3) O
– 0 V Ground GND 41 42 SPI1_CS0 SPI 1.8 V (3) O
O 1.8 V
(1)
ENET ENET0_MDC
(2)
43 44 SPI1_CS1 SPI 1.8 V
(3)
O
I/O 1.8 V
(1)
ENET ENET0_MDIO
(2)
45 46 SPI1_SDO SPI 1.8 V
(3)
O
– 0 V Ground GND 47 48 SPI1_SDI SPI 1.8 V (3) I
O 1.8 V
(1)
ENET ENET0_REFCLK_OUT
(2)
49 50 SPI1_SCK SPI 1.8 V
(3)
O
– 0 V Ground GND 51 52 GND Ground 0 V –
I 1.8 V (1) ENET ENET0_RXC (2) 53 54 ENET0_TXC (2) ENET 1.8 V (1) O
– 0 V Ground GND 55 56 GND Ground 0 V –
I 1.8 V
(1)
ENET ENET0_RX_CTL
(2)
57 58 ENET0_TX_CTL
(2)
ENET 1.8 V
(1)
O
– 0 V Ground GND 59 60 GND Ground 0 V –
I 1.8 V (1) ENET ENET0_RXD0 (2) 61 62 ENET0_TXD0 (2) ENET 1.8 V (1) O
I 1.8 V (1) ENET ENET0_RXD1 (2) 63 64 ENET0_TXD1 (2) ENET 1.8 V (1) O
I 1.8 V
(1)
ENET ENET0_RXD2
(2)
65 66 ENET0_TXD2
(2)
ENET 1.8 V
(1)
O
I 1.8 V (1) ENET ENET0_RXD3 (2) 67 68 ENET0_TXD3 (2) ENET 1.8 V (1) O
– 0 V Ground GND 69 70 GND Ground 0 V –
I 3.3 V USB USB_OTG1_ID 71 72 USB_OTG2_ID USB 3.3 V I
P 5 V USB USB_OTG1_VBUS 73 74 USB_OTG2_VBUS USB 3.3 V P
O 3.3 V USB USB_OTG1_PWR 75 76 USB_OTG2_PWR USB 3.3 V O
I 3.3 V USB USB_OTG1_OC# 77 78 USB_OTG2_OC# USB 3.3 V I
– 0 V Ground GND 79 80 GND Ground 0 V –
I/O 3.3 V USB USB_OTG1_D– 81 82 USB_OTG2_D– USB 3.3 V I/O
I/O 3.3 V USB USB 83 84 USB USB 3.3 V I/O
– 0 V Ground GND 85 86 GND Ground 0 V –
I/O 1.8 / 3.3 V SD SD1_CMD 87 88 US USB 1.0 V O
– 0 V Ground GND 89 90 USB_SS_TX– USB 1.0 V O
O 1.8 / 3.3 V SD SD1_CLK 91 92 GND Ground 0 V –
– 0 V Ground GND 93 94 US USB 1.0 V I
I/O 1.8 / 3.3 V SD SD1_DATA0 95 96 USB_SS_RX– USB 1.0 V I
I/O 1.8 / 3.3 V SD SD1_DATA1 97 98 GND Ground 0 V –
I/O 1.8 / 3.3 V SD SD1_DATA2 99 100 PCIE_TX– PCIe 0.7 V O
I/O 1.8 / 3.3 V SD SD1_DATA3 101 102 PCIe 0.7 V O
– 0 V Ground GND 103 104 GND Ground 0 V –
I 1.8 V SD SD1_WP 105 106 PCIE_RX– PCIe 0.7 V I
P 1.8 V Power V_1V8 ( 4) 107 108 PCIe 0.7 V I
I 1.8 V SD SD1_CD# 109 110 GND Ground 0 V –
I 1.8 V CONFIG PE1_INT# 111 112 PCIE_REFCLK– PCIe 0.7 V I
– 0 V Ground GND 113 114 PCIE PCIe 0.7 V I
I 3.3 V PCIe PCIE_CLKREQ# 115 116 GND Ground 0 V –
O 3.3 V PCIe PCIE_PERST# 117 118 IMX_ONOFF CONFIG 1.8 V I
I 3.3 V PCIe PCIE_WAKE# 119 120 GND Ground 0 V –
1: Depends on X1-107 (V_ENET_IN on TQMa8Xx). V_ENET_IN is hard-wired to 1.8 V on the MBa8Xx, see also chapter 3.10.
2: RGMII is not available with the i.MX 8DualX. RMII or an alternate multiplexing function can be used.
3: Depends on X2-11 (V_IO_IN on TQMa8Xx). V_IO_IN is hard-wired to 1.8 V on the MBa8Xx, see also chapter 3.10.
4: Signal V_ENET_IN on TQMa8Xx. V_ENET_IN is hard-wired to 1.8 V on the MBa8Xx, see also chapter 3.10.