A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
2
1
3
4
5
6
7
8
2
1
3
4
5
6
7
8
IC3902
MT48LC2M32B2P-6(Y14W)
SDRAM
1
10
11
12
13
14
15
16
17
18
19
2
20
21
22
23
24
25
26
27
28
29
3
30
31
32
33
34
35
36
37
38
39
4
40
41
42
43
44
45
46
47
48
49
5
50
51
52
53
54
55
56
57
58
59
6
60
61
62
63
64
65
66
67
68
69
7
70
71
72
73
74
75
76
77
78
79
8
80
81
82
83
84
85
86
9
R3919
470
C3967
0.1
B
C3954
0.1 B
C3955
0.1 B
C3956
0.1 B
C3957
0.1 B
C3958
0.1 B
C3959
0.1 B
C3960
0.1 B
C3961
0.1 B
C3962
0.1 B
C3963
0.1 B
C3965
0.1 B
C3964
0.1 B
C3968
220
6.3V
V-S
W830
WAS RECEIVED IN GOOD CONDITION AND PICTURE IS NORMAL.
WITH THE DIGITAL TESTER WHEN THE COLOR BROADCAST
NOTE:THE DC VOLTAGE AT EACH PART WAS MEASURED
OF PRINTING AND SUBJECT TO CHANGE WITHOUT NOTICE
NOTE: THIS SCHEMATIC DIAGRAM IS THE LATEST AT THE TIME
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
DATA8
DATA9
DATA10
DATA11
DATA15
DATA0
DATA12
DATA13
DATA14
DATA15
DATA14
DATA1
DATA16
DATA17
DATA13
DATA2
DATA18
DATA19
DATA20
DATA21
DATA12
DATA3
DATA22
DATA23
DATA11
DATA4
DATA24
DATA25
DATA26
DATA27
DATA10
DATA5
DATA28
DATA29
DATA9
DATA6
DATA30
DATA31
ADDR0
ADDR1
DATA8
DATA7
ADDR2
ADDR3
ADDR4
ADDR5
ADDR6
ADDR7
DQM
ADDR8
ADDR9
WEN
ADDR10
BA0
CASN
BA1
WEN
SDRAM_CLK
RASN
CASN
RASN
CSN
CSN
DQM
ADDR9
SDRAM_CLK
ADDR8
BA0
ADDR7
BA1
ADDR6
ADDR10
ADDR5
ADDR0
ADDR4
ADDR1
ADDR3
ADDR2
DATA31
DATA16
DATA30
DATA17
DATA29
DATA18
DATA28
DATA19
DATA27
DATA20
DATA26
DATA21
DATA25
DATA22
DATA24
DATA23
P.CON+3.3V
GND
G-40
G-39
CED020
PCBDS0
VSS
DQ15
VSSQ
DQ14
DQ13
DQ12
DQ11
VSSQ
DQ10
DQ9
VSS
DQ24
VSSQ
DQ25
DQ26
VDDQ
DQ27
DQ28
VSSQ
DQ29
DQ30
VDDQ
DQ31
NC
VSS
DQM3
A3
A4
A5
A6
A7
A8
A9
CKE
CLK
NC
NC
DQM1
VSS
NC
DQ8
VDDQ
VDDQ
VDD
DQ0
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ1
VDDQ
VSSQ
VSSQ
VDDQ
VDD
VDD
DQ23
VDDQ
DQ22
DQ21
VSSQ
DQ20
DQ19
DQ18
DQ17
VSSQ
VDDQ
DQ16
NC
VDD
DQM2
A2
A0
A10
BA0
WE#
A1
BA1
NC
RAS#
CAS#
CS#
DQM0
NC
NC
NC
NC
NC
NC
NC
NC
FROM/TO SCALER
0
1.5
0
1.7
1.2
3.1
1.7
1.7
0
0.2
1.6
3.1
1.6
0
0
0.6
3.1
0.9
0.9
1.2
1.2
1.2
1.2
1.2
0
0
0.3
1.5
3.1
1.7
1.3
0
1.7
1.7
3.1
1.6
1.6
0
1.6
0
3.1
2.1
3.1
1.3
1.4
0
0.3
1.3
3.1
1.3
1.2
0
1.3
3.1
0.1
1.1
1.1
1.0
0.2
2.8
2.7
2.9
3.0
3.1
3.1
0.1
3.1
0.2
2.2
2.1
0
1.3
1.3
3.1
1.3
1.1
0
1.2
1.3
3.1
1.3
3.1
0.7
0.4
0.5
0.5
SDRAM SCHEMATIC DIAGRAM
(SCALER PCB)
FROM/TO IN/OUT/REGULATOR