I
REF_FINE
=
R
SET
V
REF
1024
N
10
I
REF_COARSE
=
R
SET
V
REF
64
N
11
I
REF_PROGRAM
=
R
SET
5 V
REF
I
REF1,2
= I
REF_P
I
REF_
I
REF_FINE
Software Overview
29
SBOU123A – March 2012 – Revised September 2016
Copyright © 2012–2016, Texas Instruments Incorporated
XTR108EVM-USB Evaluation Board and Software Tutorial
5.1.4
I_REF DAC
The XTR108 contains two matched, adjustable, reference current sources for sensor excitation. Each
current source is controlled by a coarse DAC and fine DAC that together adjust the overall output. The
equations that define the output of these current sources are given in
. Note that the external
resistor (R
SET
) is used to convert the DAC reference voltage (V
REF
) into the reference current. The I
REF
DAC
section of the block diagram shows the values of the coarse and fine excitation current DACs and the
value of R
SET
(current set resistor).
(1)
N
11
and N
10
are the decimal values of registers 11 and 10, respectively.
Table 22. Equations for Calculating I
REF
Current
(1)
Current Source Output
Reference Current
Overall
Program
Coarse DAC
Fine DAC
5.1.5
I_LIN DAC
The XTR108 incorporates circuitry for correcting second-order RTD sensor nonlinearity by up to a 40:1
ratio. To achieve this, a current is added to the sensor excitation current (I
REF
) that is proportional to the
voltage at the PGA input. The current is scaled by the linearization DAC (I
LIN
) that uses the external
resistor (R
LIN
) to convert voltage into current. The I
LIN
DAC section of the block diagram shows the
hexadecimal value of the linearization register (register 14). The recommended value for the external
resistor R
LIN
is also shown at the bottom of the block diagram.
5.1.6
Overscale/Underscale
The XTR108 incorporates circuitry to set adjustable limits at the output in cases when the sensor signal
goes above or below the specified range. The circuit is designed for compliance with the NAMUR NE43
recommendation for sensor interfaces. There are 16 levels for overscale output adjustment and eight
levels for underscale output adjustment. The limit levels are listed in
and
, including the
settings of bits in the over- and underscale register (register 5) that are required for each step. Because of
the large step sizes, units that use this feature should be checked if the value is critical. Note that the
underscale limit circuit overrides the I
ZERO
DAC level if it is set lower and if there is not enough sensor
offset at the PGA input.
It may be necessary to disable limiting if the XTR108 is used in applications other than a 4-mA to 20-mA
transmitter (such as voltage-output mode) where the PGA output is between 0.5 V and 4.5 V. The
overscale and underscale section of the block diagram shows whether overscale and underscale limiting
is enabled or disabled as well as the current overscale and underscale output levels. These indicators are
set by the values read from the XTR108 registers and EEPROM, not by the values selected in the
Find
Resistors
tab in the EVM software.
