Power Up, Capturing Waveforms, and Power Down
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SLLU282A – December 2017 – Revised February 2018
Copyright © 2017–2018, Texas Instruments Incorporated
UCC5390SCD With Isolated Bias Supply
shows an example of the EVM evaluation as part of a system arranged as a buck converter.
Figure 5. Test Setup for UCC5390SCDEVM-010 System Level Evaluation
One example is a buck converter using SiC FETs, C3M0065090D, and SiC diodes, C4D20120, selected
in this case for evaluation of the EVM boards. Users can use different power devices and different
topologies that fit their projects and applications. The following is the test procedure recommended for this
test setup.
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Power Up, Capturing Waveforms, and Power Down
1. Before beginning the power up test procedure, verify the connections in
and the function
generator and oscilloscope settings.
2. Connect the function generator outputs to the EVM inputs using the BNC feed-thru terminators. Follow
all company-related safety rules applied to the voltage levels used during evaluation.
3. Enable the low-voltage power supply and gradually increase the voltage up to 3.3 V.
4. Do not enable the high voltage power supply for now.
5. Enable the function generator outputs channel A and channel B.
6. Verify that gate voltages of the lower and upper FETs are similar to that shown in
