Schematic/Revision Code Placement
4.1
Circuit Description
A brief description of the circuit elements follows:
•
Diode bridge D1, input capacitor C9, transformer (a.k.a. flyback inductor) T1, HV MOSFET Q1,
UCC28610 controller U1, Schottky rectifier D6, Output capacitors C15 and C16 form the power stage
of the converter. Note that the UCC28610 U1 is part of the power stage. This is because the DRV and
GND pins carry the full peak primary side current of the converter.
•
Capacitors C12, C14, and C17 filter the high frequency noise directly across the electrolytic input and
output capacitors.
•
The input EMI filter is made up of X2 capacitors, C1 and C6, and common mode inductor L1 and Y2
capacitors, C4 and C5. Excessive surge current protection is provided by a slow blow fuse, F1.
•
Resistor R11, capacitor C11, and diode D5 make up the primary side voltage clamp for the HV
MOSFET. The clamp prevents the drain voltage on Q1 from exceeding its maximum rating. The
integrated snubber, composed of R12 and C11, reduces the ringing on the primary side windings that
might inadvertently trigger the zero current detection circuit in the device.
•
Resistors R7, R8, and R9 supply start up bias current to the VGG shunt regulator. Schottky diode D3
is required to provide initial start up to VDD from VGG at start up.
•
Operating bias to the controller is provided by the auxiliary winding on T1, diode D2, and bulk capacitor
C7. The zener diode, D4, maintains the bias voltage on VDD below the absolute maximum rating at full
load.
•
Gate drive circuitry is composed of gate drive resistor R10, used for damping oscillations during turn
on. Resistor R16 and diode D8 are required to provide a current path at turn off because the gate is
shorted to the source of the HV MOSFET during each switching cycle. For circuits that experience high
ringing on VGG at turn off, R16 can be replaced with a ferrite bead.
•
Capacitors C8 and C10 are decoupling capacitors which should always be good quality low ESR/ESL
type capacitors placed as close to the device pins as possible and returned directly to the device
ground reference.
•
C13 filters the common mode noise between the primary and secondary sides.
•
Inductor L2, with capacitor C16, reduces the output voltage ripple.
•
Resistors R5 and R3 program the over voltage threshold. Capacitor C3 can be used to add a small
delay to ZCD, to align the turn on time of the primary switch with the resonant valley of the primary
winding.
•
Resistor R6 programs the maximum on time of the HV MOSFET.
•
Resistor R4 sets the maximum value for the peak primary current.
•
Resistor R2 and capacitor C2 provide a filter for the FB signal while resistor R1 ensures that the
optocoupler emitter current can go to 0A. Resistor R19 provides a non-intrusive point to monitor the FB
by measuring the voltage drop across R19.
•
The simple output voltage feedback loop is composed of zener diode D7, resistors R14 and R15, and
the optocoupler U2. Using an opto with a low CTR provides better noise immunity. Resistor R13 is
used as an injection point for small signal frequency response testing.
7
SLUU383B
–
November 2009
–
Revised May 2011
UCC28610EVM-474 25-W Universal Off-Line Flyback Converter
Copyright
©
2009
–
2011, Texas Instruments Incorporated
