Test Waveforms (C
L
=0pF) With Different DT Configurations
12
SLUUBG8B – June 2016 – Revised November 2018
Copyright © 2016–2018, Texas Instruments Incorporated
Using the UCC21520EVM-286, UCC20520EVM-286, UCC21521CEVM-286,
and UCC21530EVM-286
7.3
DT Pin Connected to RDT (J-DT Option C in
The dead time (DT) between the outputs of the two channels is set according to: DT (in ns) = 10 × RDT
(in k
Ω
).
The steady-state voltage at DT pin is around 0.8 V, and the DT pin current will be less than 10 µA when
R
DT
= 100 k
Ω
. Therefore, TI recommends to parallel a ceramic bypass capacitor (2.2 nF or above) with
R
DT
to achieve better noise immunity and better dead-time matching between two channels, especially
when the dead time is larger than 300 ns. The major consideration is that the current through the R
DT
is
used to set the dead time, and this current decreases as R
DT
increases. This bypass capacitor is not
installed in the EVM, but the user can easily install it on the bottom layer where the R
DT
is located.
Figure 6. Test Waveforms if DT Connected to R
DT
(Channel 3 and 4 is PWM Inputs, and Channel 1 and 2 is Driver Outputs)