Optional EEPROM Circuitry
US SS
US HS
JTAG is for lab evaluation only on TUSB8044.
This header and NOPOP pullups are not recommended
for customers.
Plac e shunts on: J7,J8,J9,J10,J11,J12
SDA_SMBDAT
PWRON1_BATEN1
SCL_PUP
SDA_PUP
SCL_SMBCLK
SDA_SMBDAT
PWRON2_BATEN2
PWRON4_BATEN4
BATEN3
BATEN0
BATEN1
OVERCUR1Z_TDI
OVERCUR2Z_TMS
PWRON3_BATEN3
BATEN2
SDA_SMBDAT
SCL_SMBCLK
GRSTZ
TEST_TRSTZ
AUTOENZ/BB_bmConfig1
SMBUSZ
TEST_TRSTZ
TEST_PUP
SMBUSZ_PD
GANGED_HS_UP/BB_CONNECT
SMBUSZ
FULLPWRMGMTZ_SS_UP/BB_bmConfig0
PWRCTL_POL_TDO
AUTOENZ_PD/BB_bmConfig1_PD
GANGED_PU/BB_CONNECT_PU
PWRCTL_POL_PD
PWRCTL_POL_TDO
GANGED_HS_UP/BB_CONNECT_2
AUTOENZ/BB_bmConfig1
FULLPWRMGMTZ_PUP/BB_bmConfig0_PU
GANGED_HS_UP/BB_CONNECT
FULLPWRMGMTZ_SS_UP/BB_bmConfig0
OVERCUR3z_TCK
OVERCUR2Z_TMS
OVERCUR1Z_TDI
PWRCTL_POL_TDO
TEST_TRSTZ
SCL_PD
SDA_PD
FULLPWRMGMTZ_SS_UP/BB_bmConfig0_2
AUTOENZ/BB_bmConfig1_2
AUTOENZ_PU/BB_bmConfig1_PU
SCL_SMBCLK
VDD11
BOARD_1P1V
BOARD_3P3V
VDD11
VDD33
BOARD_3P3V
BOARD_3P3V
VDD33
BOARD_3P3V
BOARD_3P3V
USB_DP_DN4
2
USB_DM_DN4
2
USB_SSRXP_DN4
2
USB_SSRXM_DN4
2
USB_SSTXP_DN4
2
USB_SSTXM_DN4
2
USB_DP_DN2
2
USB_DM_DN2
2
USB_SSRXP_DN2
2
USB_SSRXM_DN2
2
USB_SSTXP_DN2
2
USB_SSTXM_DN2
2
USB_DP_UP
2
USB_DM_UP
2
USB_SSRXP_UP
2
USB_SSRXN_UP
2
USB_SSTXP_UP
2
USB_SSTXM_UP
2
USB_VBUS_UP
2
USB_SSTXM_DN3
2
USB_SSTXP_DN3
2
USB_SSRXM_DN3
2
USB_SSRXP_DN3
2
USB_DP_DN3
2
USB_DM_DN3
2
PWRON4_BATEN4
3
PWRON1_BATEN1
3
PWRON2_BATEN2
3
PWRON3_BATEN3
3
USB_DP_DN1
2
USB_DM_DN1
2
USB_SSTXM_DN1
2
USB_SSTXP_DN1
2
USB_SSRXM_DN1
2
USB_SSRXP_DN1
2
OVERCUR1Z_TDI
3
OVERCUR2Z_TMS
3
OVERCUR3Z_TCK
3
R39
1K
C18
10uF
C2
18pF
R23
1K
C21
0.1uF
C17
0.1uF
R5
1K
0402
R48
1K
C10
0.01uF
C27
0.1uF
C15
0.001uF
R22
1K
0402
Y1
ECS-24MHZ
R45
NOPOP
C11
0.1uF
R44
NOPOP
C24
0.1uF
C9
0.001uF
R14
1K
0402
R8
4.7K
0402
J12
Header 1x2
1
2
R43
NOPOP
J9
Header 1x2
1
2
R12
1K
0402
C30
0.1uF
R42
NOPOP
R41
330 - DNI
R9
4.7K
0402
J13
1
2
3
FB1
220 @ 100MHZ
C8
0.1uF
R3
10K
0402
C14
0.1uF
C4
0.1uF
C31
10uF
R47
1K
C20
0.01uF
C16
0.01uF
D2
LED-DNI
R21
9.53K
C22
0.001uF
FB2
220 @ 100MHZ
C1
18pF
R2
90.9K
0402
C26
0.01uF
C19
0.001uF
C13
0.01uF
J8
Header 1x2
1
2
C34
0.1uF
R11
1K
0402
C6
0.001uF
C25
0.001uF
R38
1K
R7
4.7K
0402
SW2
8-POS 50-MIL SMT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
C12
0.001uF
SW1
8-POS 50-MIL SMT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
C5
1uF
R4
1K
0402
C33
0.01uF
U2
AT24C04
A0
1
A1
2
A2
3
GND
4
VCC
8
WP
7
SCLK
6
SDATA
5
C3
1uF
J7
Header 1x2
1
2
R10
NOPOP
R6
4.7K
0402
C28
0.001uF
R46
1K
R1
1M
C29
0.01uF
R24
1K
0402
GND2
1
J11
Header 1x2
1
2
C7
0.01uF
C32
0.001uF
R13
1K
0402
R40
330 - DNI
J10
Header 1x2
1
2
JP6
Conn 2x5 shroud
1
2
3
4
5
6
7
8
9
10
C23
0.01uF
GND1
1
R25
1K
D3
LED-DNI
U1
TUSB8044
US
B
_DP
_DN4
24
US
B
_DM
_DN4
25
VDD11
5
US
B
_S
S
RX
P
_DN4
29
US
B
_S
S
RX
M
_DN4
30
US
B
_S
S
TX
P
_DN4
26
US
B
_S
S
TX
M
_DN4
27
VDD11
8
VDD11
13
USB_SSRXP_DN2
14
USB_SSRXM_DN2
15
USB_SSTXP_DN2
11
USB_SSTXM_DN2
12
V
DD1
1
21
USB_DP_DN2
9
USB_DM_DN2
10
V
DD1
1
28
V
DD33
52
OVRCUR4Z
43
OVRCUR3Z_TCK
44
OVRCUR1Z_TDI
46
OVRCUR2Z_TMS
47
AUTOENZ_HS_SUSPEND
45
VDD33
16
GR
S
TN
50
SCL_SMBCLK
38
SDA_SMBDAT
37
V
DD1
1
31
P
W
RON
4Z_B
A
TE
N4
32
SMBUSZ_SS_SUSPEND
39
V
DD33
63
V
DD1
1
51
V
DD1
1
57
US
B
_DM
_DN3
18
US
B
_DP
_DN3
17
VDD33
34
US
B
_S
S
RX
P
_DN3
22
US
B
_S
S
RX
M
_DN3
23
US
B
_S
S
TX
P
_DN3
19
US
B
_S
S
TX
M
_DN3
20
USB_SSRXP_DN1
6
USB_SSRXM_DN1
7
USB_SSTXP_DN1
3
USB_SSTXM_DN1
4
USB_DM_DN1
2
USB_DP_DN1
1
US
B
_S
S
TX
M
_UP
56
US
B
_S
S
TX
P
_UP
55
US
B
_S
S
RX
M
_UP
59
US
B
_S
S
RX
P
_UP
58
US
B
_DM
_UP
54
US
B
_DP
_UP
53
USB_VBUS
48
X
O
61
X
I
62
US
B
_R1
64
NC
60
FULLPWRMGMTZ_SMBA1_SS_UP
40
PWRCTL_POL_TDO
41
GANGED_SMBA2_HS_UP
42
PWRON1Z_BATEN1
36
PWRON2Z_BATEN2
35
PWRON3Z_BATEN3
33
TE
S
T_TR
S
Tz
49
PPAD
65
Copyright © 2017, Texas Instruments Incorporated
9
SLLU261A – April 2017 – Revised February 2019
Copyright © 2017–2019, Texas Instruments Incorporated
TUSB8044RGC REVD EVM Schematics
Appendix B
SLLU261A – April 2017 – Revised February 2019
TUSB8044RGC REVD EVM Schematics
through
the TUSB8044RGC REVD EVM schematics.
Figure 2. TUSB8044RGC REVD EVM Top Layer Layout
