Introduction
2
SLLU261A – April 2017 – Revised February 2019
Copyright © 2017–2019, Texas Instruments Incorporated
TUSB8044RGC Evaluation Module
1
Introduction
Upon request, layout files for the EVM can be provided to illustrate techniques used to route the
differential pairs, use of split power planes, placement of filters and other critical components, and
methods used to achieve length matching of critical signals.
NOTE:
The EVM accommodates various lab test components; actual production implementations
can be much smaller.
illustrates the
TUSB8044RGC EVM
top layer layout.
Figure 1. TUSB8044RGC EVM Top Layer Layout