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2 Hardware Configuration

2.1 Power

The EVM board can be powered from either the Micro-B receptacle (J1) VBUS or from an external power supply 
through the barrel jack (J2). The EVM defaults to being powered from the Micro-B receptacle VBUS.

If powering EVM from barrel jack, make sure R54 is unpopulated. Once removed, a jumper will need to be 
placed across JMP19 pins 1 and 2.

The USB Type-C receptacle VBUS uses TPS25820 as the VBUS power switch needed for USB Type-C 
systems. Power is sourced from the Micro-B receptacle VBUS by default. JMP1 can be used to change the 
power source at the USB Type-C receptacle VBUS pins.

If powering USB Type-C VBUS from barrel jack or other source, make sure R14 is unpopulated. Once removed, 
a jumper will need to be placed across JMP1 pins 1 and 2 to use power form the barrel jack. If a different 
external power source is used, connect the source directly to JMP 1 pin 2.

Note

Limit VBUS voltage and voltage from barrel jack to no more than 6 V.

2.2 Configuration Jumpers

Multiple jumpers are provided on the EVM for configuration of TUSB1142 and also for probe points.

The following is a list of 4-level jumpers which are used to configure the TUSB1142: JMP6, JMP7, JMP8, JMP9, 
JMP10, JMP11, JMP12, and JMP13. The jumper position to select between the different levels is detailed in 

4-level Configuration Jumper Settings Table

.

Note

4-level pins are sampled on rising edge of EN pin. Therefore, a change in any 4-level pin state will not 
be applied until after EN pin is toggled from low to high.

Table 2-1. 4-Level Configuration Jumper Settings

Jumper Position

4-level State

Short 5 to 6

0

Short 3 to 4

R

Open

F

Short 1 to 2

1

Table 2-2. Jumpers

Jumper

Default Position

Description

JMP2

Open

CC1. Pin 1 is probe point for CC1

JMP3

Open

CC2. Pin 1 is probe point for CC2

JMP4

Short 3 to 4

FLIP/SCL.
If TUSB1142 is configured for I2C mode (MODE pin (JMP13)) is floating, then jumper is 
clock for local I2C. Ensure R19 is populated.
If TUSB1142 is configured for pin-strap mode, then this jumper controls the internal 2:1 
mux.

By default this pin is controleld be U2 based on the CC pin configuration.

If manual control is desired, ensure that R19 is populated :

Short 1 to 2: CRX1 -> SSRX and SSTX -> CTX1.

Short 3 to 4: CRX2 -> SSRX and SSTX -> CTX2

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Hardware Configuration

SLLU350 – APRIL 2022

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TUSB1142 EVM User's Guide

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Содержание TUSB1142

Страница 1: ...haracteristics and requirements Engineers should refer to the data sheet for technical details such as device operation terminal description and so forth Table of Contents 1 Overview 2 1 1 What is the TUSB1142 EVM 2 1 2 What is Included in the TUSB1142 EVM 2 1 3 What Does the EVM Look Like 2 2 Hardware Configuration 3 2 1 Power 3 2 2 Configuration Jumpers 3 2 3 CEQ Configuration 5 2 4 SSEQ Configu...

Страница 2: ... receptacle The user can insert a USB device directly or thru a USB Type C cable into the receptacle side of the EVM board 1 2 What is Included in the TUSB1142 EVM The major components of the EVM are as follows TUSB1142 device USB Micro B receptacle connector USB Type C receptacle connector Headers for configurating various TUSB1142 features 1 3 What Does the EVM Look Like Figure 1 1 EVM Board Ove...

Страница 3: ...s The following is a list of 4 level jumpers which are used to configure the TUSB1142 JMP6 JMP7 JMP8 JMP9 JMP10 JMP11 JMP12 and JMP13 The jumper position to select between the different levels is detailed in 4 level Configuration Jumper Settings Table Note 4 level pins are sampled on rising edge of EN pin Therefore a change in any 4 level pin state will not be applied until after EN pin is toggled...

Страница 4: ... Selects upper limit for AEQ Refer to TUSB1142 data sheet for details JMP10 Open CEQ1 If TUSB1142 is configured for pin strap mode then this jumper along with JMP10 selects EQ settings for CRX receivers Refer to TUSB1142 data sheet for details on EQ settings JMP11 Open CEQ0 If TUSB1142 is configured for pin strap mode then this jumper along with JMP10 selects EQ settings for CRX receivers Refer to...

Страница 5: ... 15 1 1 Highest EQ setting 2 4 SSEQ Configuration There are sixteen EQ settings with 0 being the lowest and Fh being the highest Table 2 4 USB Host Facing Port Receiver SSTX1 and SSTX2 pins Equalization Control Register s SSEQ1_SEL or SSEQ2_SEL Equalization Setting SSEQ1 PIN LEVEL SSEQ0 PIN LEVEL EQ Gain at 5 GHz minus Gain at 100 MHz dB 0 0 0 Lowest Setting 1 0 R 2 0 F 3 0 1 4 R 0 5 R R 6 R F 7 R...

Страница 6: ...An example of an external I2C Host controller is the Total Phase Aardvark I2C SPI Host Adapter Total Phase Part TP240141 Table 2 5 TUSB1142 I2C Target Address SSEQ1 A1 PIN LEVEL SSEQ0 A0 PIN LEVEL 7 bit Address Bit 7 MSB Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 W R 0 0 44h 1 0 0 0 1 0 0 0 1 0 R 45h 1 0 0 0 1 0 1 0 1 0 F 46h 1 0 0 0 1 1 0 0 1 0 1 47h 1 0 0 0 1 1 1 0 1 R 0 20h 0 1 0 0 0 0 0 0 1 R R...

Страница 7: ...ured for I2C mode and is powered from the barrel jack 1 Insertion 5 V DC Power source into barrel jack J1 2 Configure TUSB1142 through the I2C interface JMP4 and JMP5 3 Insert the Micro B USB cable into the Micro B receptacle J1 and connect the Type A receptacle of the motherboard to the EVM through the same cable Note For I2C operation ensure that R19 is populated 4 Insert a USB C cable or USB de...

Страница 8: ...4 Schematics Schematics www ti com 8 TUSB1142 EVM User s Guide SLLU350 APRIL 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated ...

Страница 9: ...www ti com Schematics SLLU350 APRIL 2022 Submit Document Feedback TUSB1142 EVM User s Guide 9 Copyright 2022 Texas Instruments Incorporated ...

Страница 10: ...Schematics www ti com 10 TUSB1142 EVM User s Guide SLLU350 APRIL 2022 Submit Document Feedback Copyright 2022 Texas Instruments Incorporated ...

Страница 11: ...o change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for and you will fully indemn...

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