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4
1
3
2
Key1
4
1
3
2
Key2
4
1
3
2
Key3
GND
2.8 V: R1 = 1.07M
2.5 V: R1 = 866k
2.2 V: R1 = 673k
Feeback Loop Resistors
Vout = (Vref) * (1 + (R1/R2))
Vref = 1.20 V R2= 1M
4
1
3
2
Key4
VDD input range is 2.5 V to 4.5 V
RING1
TIP
GND
/INT
SCL
SDA
GND
FB
1
NC
3
IN
4
OUT
5
2
GND
U2
TPS71401DCKT
GND
R20
DNP
806k
R24
1.07M
R21
866k
R22
GND
GND
GND
33µF
C10
2.2µF
C9
VDDIO
VCC
Connector to interface with Codec
SLEEVE
1µF
C7
0.1µF
C8
1µF
C5
0.1µF
C6
GND
2.20k
R14
R9
DNP
MICP
MICP
RING2
Key 1-4 resistance are calculated so that when in parallel with a 2.2 kohm mic the equivalent resistance seen by the TS3A227E is within
the bins shown above
GND
GND
1µF
C3
0.1µF
C4
1µF
C1
0.1µF
C2
GND
GND
1
VREF_A
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10
B8
11
B7
12
B6
13
B5
14
B4
15
B3
16
B2
17
B1
18
VREF_B
19
EN
20
U3
LSF0108PW
200k
R15
SDA
/INT
/MIC_PRESENT
/MIC_PRESENT
MSP430_/INT
MSP430_/MIC_PRESENT
/MIC_PRESENT
SDA
SCL
/INT
MSP430_/MIC_PRESENT
MSP430_/INT
MSP430_SDA
MSP430_SCL
VCC
VCC
MSP430_SDA
MSP430_SCL
4.7k
R16
4.7k
R17
4.7k
R18
4.7k
R19
4.7k
R6
4.7k
R5
4.7k
R4
4.7k
R3
VDDIO can be separate supply for GPIO pins
VDDIO input range is 1.8 V to VDD
J3 is used to select between a separate VDDIO voltage and
the MSP430 supply being used to power the board
VCC
VDDIO
VDD
GND
VCC
J1
VCC
VCC
VDD
VCC is the MSP430 supply to the board.
J_VDD can be used to connect the MSP430 supply to the TS3A227E
VDDIO
MSP430 LaunchPad Jumper connectors
RING1
TIP
TIP
/DET_TRIGGER
RING2
SLEEVE
Connector to TS3A227E
Q1
GND
VDD
RING1
TIP
10k
R7
10k
R8
GND
1
2
MK1
2.2kohm
1.0
R10
143
R11
270
R12
590
R13
J21
J23
J25
J26
GND
Blue
D1
5
4
1
2
3
6
7
8
9
10
J18
5
4
1
2
3
6
7
8
9
10
J19
TIP
RING1
RING2
SLEEVE
330k
R2
SCL
MICP
GND
MICP
GND
1
GND
2
SDA
3
VDD
4
GND_SENSE
5
MICP
6
RING2_SENSE
7
SLEEVE_SENSE
8
SCL
9
SLEEVE
10
GNDA
11
RING2
12
INT
13
TIP
14
DET_TRIGGER
15
MIC_PRESENT
16
PAD
17
U1
TS3A227ERVA
1.50k
R1
680k
R23
5
3
2
1
4
J4
5
3
2
1
4
J10
SLEEVE
RING2
1
2
3
4
5
6
7
8
J27
1
2
3
J3
1
2
3
4
5
6
7
8
J22
1
2
3
4
J12
1
2
3
J17
1
2
3
J14
/DET_TRIGGER
GND_SENSE
GND_SENSE
VDD
1
2
J15
1
2
J20
1
2
J2
1
2
J24
J9
J8
J7
J11
J13
1
2
J16
J5
J6
Board Documentation
8
Board Documentation
This section includes the TS3A227E-EVM schematic, BOM, and board layouts.
8.1
Schematic
illustrates the TS3A227E-EVM schematic.
Figure 21. Schematic
19
SLVUAD9 – December 2014
TS3A227E EVM User's Guide
Copyright © 2014, Texas Instruments Incorporated