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3 Schematic and Layout

The TRS3221RGTEVM has simple connections to all necessary pins of the TRS3221RGT transceiver device,
and jumpers where necessary to provide flexibility for device. The TRS3221RGTEVM provides test points for all
RS-232 (TX1, RX1) and logic (TX2, RX2) communication lines. Additionally test points of GND, VCC, and
charge pump output voltage are available for probing and evaluation.

3.1 Schematic

The schematic is shown in 

Figure 3-1

. The function of each jumper and test point is listed in 

Table 3-1

.

GND

GND

VCC

VCC

GND

16V

0.1uF

C2

16V

0.1uF

C4

16V

0.1uF

C1

0

R5

0

R6

0

R7

10.0k

R1

TX1

TX1

RX1

RX1

RX2

RX2

TX2

TX2

V-

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

J2

1uF

C6

1

2

3

4

5

6

7

8

9

1

1

1

0

J1

618009231121

INV

10.0k

R2

ON

OFF

INV

ON

OFF

VCC

12

EN

14

FORCEOFF

13

INVALID

7

C1+

16

C1-

1

C2+

2

C2-

3

FORCEON

9

RIN

5

ROUT

6

Thermal_Pad

17

TIN

8

TOUT

10

V+

15

V-

4

GND

11

TRS3221EIRGTR

U0

VCC

16V

0.1uF

C3

10V

0.1uF

C5

V+

GND

VCC

10.0k

R3

10.0k

R4

EN

ON

OFF

EN

EN

10.0k

R8

GND

Figure 3-1. TRS3221RGTEVM Schematic

Table 3-1. Jumpers and Test Points

Connection

Type

Description

J1

9-pin connector

Female DB9 connector to
connect to PC

J2

16-pin jumper

Used for supply and TTL signal

V+

Test point

Charge pump positive output

V-

Test point

Charge pump negative output

Power and logic signal go through the J1 connector. 

Table 3-2

 lists each pin’s connection.

Table 3-2. J1 pin connection

Connection

Type

Description

1

NC

Not connected

2

Output

RX1, pin 10 of transceiver

3

Input

TX1, pin 5 of transceiver

4

Loopback

Connected to pin 6

5

GND

Ground

6

Loopback

Connected to pin 4

7

NC

Not connected

8

NC

Not connected

9

NC

Not connected

The female DB9 port (

Figure 3-2

) provides access to the TRS3221RGT device through a standard RS-232

pinout. The TRS3221RGT female port is DCE to mate with a computer male DTE port. The pin names are
counterintuitive on the DCE side. For example, the RX pin on EVM is connected to a driver and TX connects to a
receiver. The reason pins 4 and 6 are shorted together by a 0 Ω resistor is to loopback the unused handshaking
lines.

Schematic and Layout

www.ti.com

4

TRS3221 EVM User's Guide

SLLU328 – DECEMBER 2020

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Copyright © 2020 Texas Instruments Incorporated

Содержание TRS3221RGTEVM

Страница 1: ...of Contents 1 Introduction 2 Features 2 Applications 2 Description 2 2 Test Setup 3 2 1 Overview and Basic Operation Settings 3 3 Schematic and Layout 4 3 1 Schematic 4 3 2 Layout 6 3 3 Bill of Materi...

Страница 2: ...Equipment Description The TRS3221RGTEVM is an evaluation module for the TRS3221RGT and TRSF3221RGT devices normal and high speed RS 232 transceivers The module enables device evaluation using the inst...

Страница 3: ...ge pump operation can be checked by monitoring these two test points TIN input pin 8 of J2 Connect the function generator to pin 8 of the J2 header on the board Set the function generator to generate...

Страница 4: ...TEVM Schematic Table 3 1 Jumpers and Test Points Connection Type Description J1 9 pin connector Female DB9 connector to connect to PC J2 16 pin jumper Used for supply and TTL signal V Test point Charg...

Страница 5: ...6 of transceiver 7 GND Ground 8 Input RX2 pin 8 of transceiver 9 GND Ground 10 Input OFF pin 13 of transceiver 11 GND Ground 12 Input EN pin 14 of transceiver 13 GND Ground 14 Power Vcc 15 GND Ground...

Страница 6: ...ion Table INPUTS 1 OUTPUT RECEIVER STATUS RIN EN VALID RIN RS 232 LEVEL ROUT X H X Z Output off L L X H Normal operation H L X L Open L No H 1 H high level L low level X irrelevant Z high impedance of...

Страница 7: ...Sullins Connector Solutions R1 R2 R3 R4 R8 5 10 0k RES 10 0 k 1 0 1 W 0402 0402 ERJ 2RKF1002X Panasonic R5 R6 R7 3 0 RES 0 5 0 1 W AEC Q200 Grade 0 0402 0402 ERJ 2GE0R00X Panasonic U0 1 RS 232 Transce...

Страница 8: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Страница 9: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Страница 10: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Страница 11: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Страница 12: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Страница 13: ...e resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reprod...

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