Texas Instruments TPSM8D6C24, Руководство пользователя, Страница: 7 / 38

• Output load connection to the VOUT and PGND terminal blocks (T5, T6, T7, and T8) – The minimum
recommended wire size is AWG #10, with the total length of wire less than two feet (1 foot output, 1 foot
return). A thicker wire gauge can be required to minimize the voltage drop in the wires.
4.3 List of Test Points, Jumpers, and Connectors
Table 4-1 lists the test point functions.
Table 4-1. Test Point Functions
Test Point Name Description
TP1 PVIN PVIN test point
TP2, TP3,
TP4, TP10,
TP16,
TP22, TP27
PGND PGND test point
TP5 Remote Sense Vout (+) VOUT remote sense + voltage point
TP6 VOUT VOUT sensing test point
TP7 CHA_Vout Channel A for VOUT small signal loop gain measurements (B/A setup)
TP8 CHB_Vout Channel B for VOUT small signal loop gain measurements (B/A setup)
TP9 Remote Sense Vout (–) VOUT remote sense — voltage point
TP11 PGood_A PGOOD signal of VOUT
TP12 VSHARE_A VSHARE_A measurement point. Sensitive signal
TP13 VSHARE_B VSHARE_B measurement point. Sensitive signal
TP15 SYNC External clock input (SYNC IN) or output to synchronize other devices (SYNC OUT)
TP18 VOUT_B VOUT sensing test point
TP23 CNTL CNTL signal on J2 header
TP24 CLK CLK signal on J2 header
TP25 SMBALRT SMBALERT signal on J2 header
TP26 DATA DATA signal on J2 header
Table 4-2 lists the EVM jumpers.
Table 4-2. Jumpers
Jumper Name Description
JP1 AVIN_A AVIN_A input source selection
JP2 AVIN_B AVIN_B input source selection
JP3 EN_A EN_A pin selections
JP4 EN_B EN_B pin selections
JP5 VDD5_A External VDD5_A connection
JP6 VDD5_B External VDD5_B connection
JP7 USB to PVIN Short to connect PVIN to Micro USB connector.
JP8 PMBus to AVIN Short to connect USB-to-GPIO 3.3 V to AVIN.
Table 4-3 lists the options for the EN/UVLO pin selections on JP2 and JP4.
Table 4-3. JP3 and JP4 Selections
Shunt Position Selection
CNTL_INPUT PMBus adapter control signal
UVLO Resistor divider to PVIN
DISABLE EN/UVLO short to ground
Table 4-4 lists the options for the AVIN pin selections on JP1 and JP2.
www.ti.com Test Setup
SLUUCL8A – DECEMBER 2021 – REVISED FEBRUARY 2022
Submit Document Feedback
TPSM8D6C24 2-Phase Power Module Evaluation Module User's Guide 7
Copyright © 2022 Texas Instruments Incorporated