5 Board Layout
through
show the board layout for the TPS7H4010EVM. The EVM offers resistors,
capacitors, and test points to configure the output voltage, precision enable pin, set frequency, and external
clock synchronization.
The 30-pin WQFN package offers an exposed thermal pad which must be soldered to the copper landing on the
PCB for optimal thermal performance. The PCB consists of a 4-layer design. There are 2-oz copper planes on
the top and bottom and 1-oz copper mid-layer planes to dissipate heat with an array of thermal vias under the
thermal pad to connect to all four layers.
Test points have been provided for ease of use to connect the power supply, required load, and to monitor critical
signals.
Figure 5-1. Top Layer and Silkscreen Layer
Board Layout
12
TPS7H4010EVM User's Guide
SNVU744 – OCTOBER 2020
Copyright © 2020 Texas Instruments Incorporated
