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2.4 Optional Load Transient Circuit Operation

The TPS7A57EVM-056 evaluation module contains an optional high-performance load transient circuit to allow 
efficient testing of the TPS7A57 LDO load transient performance. To use the optional load transient circuit, install 
the correct components in accordance with the application. Modify the input and output capacitance connected 
to the TPS7A57 LDO to match the expected operating conditions. As given by 

Equation 1

, determine the desired 

peak current to test and modify the parallel resistor combination of R10, 11, R12, R13, and R14.

I

Peak

=

VOUT

R10 ∥ R11 ∥ R12 ∥ R13 ∥ R14

(1)

The slew rate of the load step can be adjusted by C11, R15, and R21. In this section, only R21 is adjusted to 
set the slew rate. For a 0-mA to 5-A load step, use 

Table 2-1

 to help select a value of R21 that results within a 

desired rise or fall time.

Table 2-1. Suggested Ramp Rate Resistor Values

R21

Rise Time

Fall Time

49.9 kΩ

11.5 µs

31 µs

30.9 kΩ

7.4 µs

19.7 µs

24.9 kΩ

6 µs

15.1 µs

21.5 kΩ

3.9 µs

14.8 µs

4.12 kΩ

980 ns

2.5 µs

After the EVM is modified (if needed), and if the LMG1020 gate driver is used, connect a power supply to 
banana connectors J7(VCC) and J8 (GND) with a 5-V DC supply and a 1-A DC current limit. As illustrated in 

Figure 2-3

, the TPS7A57 transient response is very fast and the output voltage recovers in well under 1 ms after 

the initial load transient. Therefore, use a load transient pulse duration limit of 1 ms to prevent excessive heating 
of the pulsed resistors (R10, R11, R12, R13, and R14). Configure a function generator for the 50-Ω output, in 
a 0-V DC to 5-V DC square pulse. If necessary, burst mode can be configured in the function generator for 
repetitive, low duty cycle, load transient testing.

Figure 2-3

 provides example test data with R21 = 21.5 kΩ. The blue trace is the output voltage and the green 

trace is the output current. R10, R11, R12, R13, and R14 provide 5-A of pulsed load. The resulting test data 
shows a 0-mA to 5-A load step on VOUT of the LDO, with only a 22-μF capacitor on the output of the LDO.

The load transient circuit also provides footprints to install a damping network as needed. Install R23 and C15 to 
create a damping network if needed.

Alternatively, load transient measurements can be achieved by solely using the pre-installed Q1 load transient 
MOSFET. J15 can be used to provide a signal to Q1 using a function generator

Figure 2-4

 depicts results using 

the MOSFET without the LMG1020 gate driver at a 5-A load.

www.ti.com

Setup

SBVU075 – APRIL 2022

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Содержание TPS7A57EVM-056

Страница 1: ...A57 low dropout linear regulator LDO Included in this user s guide are setup and operating instructions thermal and layout guidelines a printed circuit board PCB layout schematic diagrams and a bill o...

Страница 2: ...ent Results 8 Figure 2 4 TPS7A57EVM 056 Load Transient Results With a Q1 MOSFET 8 Figure 3 1 Top Assembly Layer and Silkscreen 9 Figure 3 2 Top Layer Routing 9 Figure 3 3 Layer 2 9 Figure 3 4 Layer 3...

Страница 3: ...A57 The header connects the REF pin to a resistor to set a given output voltage value The voltage options are 0 5 V 1 2 V 1 8 V 2 5 V 3 3 V 5 0 V 2 1 4 J4 EN J4 EN is a 3 pin header used to enable or...

Страница 4: ...nt MOSFET drain voltage 2 2 4 IN1 IN1 is the connection for the function generator to drive the gate driver device IN1 is terminated by the 50 resistor R22 2 2 5 J15 J15 is a high frequency kelvin con...

Страница 5: ...across the header to tie GND to EN or leaving the 3 pin header floating disables the device 3 Placing a 2 pin shunt across the header to tie GND to CP_EN disables the internal charge pump Alternativel...

Страница 6: ...through these connectors In cases where very fast transient tests are performed ringing may occur on VIN or VOUT as a result of the parasitic inductance within the PCB of the EVM A strip of wire place...

Страница 7: ...current limit As illustrated in Figure 2 3 the TPS7A57 transient response is very fast and the output voltage recovers in well under 1 ms after the initial load transient Therefore use a load transie...

Страница 8: ...ad Transient Results Figure 2 4 TPS7A57EVM 056 Load Transient Results With a Q1 MOSFET Setup www ti com 8 TPS7A57EVM 056 Evaluation Module SBVU075 APRIL 2022 Submit Document Feedback Copyright 2022 Te...

Страница 9: ...7 LDO LMG1020YFFR gate driver and pulsed resistors R10 R11 R12 R13 and R14 are most at risk of raising to a high junction temperature during normal operation Figure 3 1 Top Assembly Layer and Silkscre...

Страница 10: ...r 5 Figure 3 7 Bottom Layer Routing Figure 3 8 Bottom Assembly Layer and Silkscreen Board Layout www ti com 10 TPS7A57EVM 056 Evaluation Module SBVU075 APRIL 2022 Submit Document Feedback Copyright 20...

Страница 11: ...1 OUT 12 BIAS 5 CP_EN 15 EN 16 NR SS 8 PG 14 REF 7 SNS 13 Thermal_Pad 17 GND 6 TPS7A5701RTET U1 CP_EN EN Vbias Vin GND REF NR 4 7 F 16V C10 Vout TP7 2 00M R2 2 00M R3 TP1 22 F 10V C5 6 3V 1uF C6 10uF...

Страница 12: ...3202Q2 0 R25 R13 R14 R12 R11 R10 R17 R18 R19 R16 R20 J7 J8 Drain Gate 1 2 3 4 5 J15 100V 1pF C11 0 R15 50V 0 015uF C16 1 00k R24 50V 10uF C14 50V 10uF C13 50V 0 1uF C12 TP13 Figure 4 2 Load Transient...

Страница 13: ...to buy or mount N A N A N A J1 1 Header 100mil 2x1 Tin SMD SMD 2 Leads Body 200x100mil TSM 102 01 T SV P TR Samtec J2 1 Jumper SMT shorting jumper SMT JMP 36 30X40SMT Any J3 1 Header 2 54mm 6x2 Gold S...

Страница 14: ...uF 6 3 V 10 X7R 0402 402 GRM155R70J105K A12D MuRata C8 0 10uF CAP CERM 10 uF 25 V 10 X7R 0805 805 GRM21BZ71E106K E15L MuRata C11 0 1pF CAP CERM 1 pF 100 V 5 C0G NP0 0805 805 GQM2195C2A1R0 CB01D MuRat...

Страница 15: ...12 TP13 0 Test Point Compact SMT Testpoint_Keystone _Compact 5016 Keystone U2 0 5V 7A 5A Low Side GaN Driver With 60MHz 1ns Speed YFF0006AEAE DSBGA 6 YFF0006AEAE LMG1020YFFR Texas Instruments LMG1020Y...

Страница 16: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Страница 17: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Страница 18: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Страница 19: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Страница 20: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Страница 21: ...change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of thes...

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