Texas Instruments TPS7A53EVM-031 Скачать руководство пользователя страница 4

EVM Setup

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SBVU059 – December 2019

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TPS7A53EVM-031 Evaluation Module

2

EVM Setup

This section describes how to properly connect and set up the TPS7A53EVM-031, including the jumpers
and connectors on the EVM board.

2.1

Input/Output Connectors and Jumper Descriptions

2.1.1

J1 – VIN

Input power-supply voltage SMA jack connector.

2.1.2

J2 – VIN

Input power-supply voltage standard banana jack connector. Twist together the positive input lead and
ground return lead from the input power supply, and keep them as short as possible to minimize input
inductance. Add additional bulk capacitance between the input supply and ground (use the C1 footprint) if
the supply leads are greater than six inches. For example, an additional 47-µF electrolytic capacitor
connected from the input supply (J1) to ground can improve the transient response of the
TPS7A5401RPS, and eliminates unwanted ringing on the input because of long wire connections.

2.1.3

J3 – EN

Output enable. To enable the output, connect a jumper to short VIN to EN.

2.1.4

J4 – VOUT

Output voltage SMA jack connector.

2.1.5

J5 – PG

Pullup-voltage selector for PG. This EVM is designed so that PG can be pulled up either to VOUT by
shorting J5, or pulled up to another voltage by applying an external voltage to the PG post.

2.1.6

J6 – VOUT

Output voltage standard banana jack connector.

2.1.7

J7 – BIAS

Bias voltage standard banana connector.

If the input supply (VIN) voltage is less than 1.4 V but greater than 1.1 V, use a bias voltage of 3.0 V to
6.5 V to provide power to the TPS7A5401RPS. If the input voltage is greater than 1.4 V, the BIAS pin
does not have to be connected. The BIAS supply pin typically consumes 2.3 mA.

2.1.8

J8 – GND

Input and Bias ground return connector.

2.1.9

J9 – GND

Output ground return connector.

2.1.10

J10 -- GND

Inout and Bias ground return connector.

2.1.11

J11

6 × 1 header, can be used as test points for LDO inputs and outputs.

Содержание TPS7A53EVM-031

Страница 1: ...aluation of the TPS7A53EVM 031 low dropout linear regulator LDO Included in this user s guide are setup and operating instructions thermal and layout guidelines a printed circuit board PCB layout a sc...

Страница 2: ...Jumper Descriptions 4 2 2 Soldering Guidelines 5 2 3 Equipment Connection 5 3 Operation 6 4 PCB Layout 6 5 Schematic 8 6 Bill of Materials 9 List of Figures 1 Top Composite View 6 2 Top Layer Routing...

Страница 3: ...warnings and cautions are noted for the safety of anyone using or working close to the TPS7A53EVM 031 Observe all safety precautions Warning Warning Hot surface Contact may cause burns Do not touch CA...

Страница 4: ...rove the transient response of the TPS7A5401RPS and eliminates unwanted ringing on the input because of long wire connections 2 1 3 J3 EN Output enable To enable the output connect a jumper to short V...

Страница 5: ...r Bias 2 1 21 TP9 GND Ground sense test point 2 2 Soldering Guidelines To avoid damaging the integrated circuit IC use a hot air system for any solder rework to modify the EVM for the purpose of repai...

Страница 6: ...ule 3 Operation Use the following steps to operate the equipment 1 Turn on the power supplies 2 Enable the output by jumping J3 the EN pin to VIN 3 Vary the respective load and input voltage as necess...

Страница 7: ...7 SBVU059 December 2019 Submit Documentation Feedback Copyright 2019 Texas Instruments Incorporated TPS7A53EVM 031 Evaluation Module Figure 3 Mid Layer 1 Routing Figure 4 Mid Layer 2 Routing Figure 5...

Страница 8: ...74k R4 11 8k R3 GND BIAS 5 EN 3 FB 9 GND 6 GND 7 GND 12 IN 1 IN 2 NR SS 4 OUT 10 OUT 11 PG 8 TPS7A5301RPST U1 VIN VOUT EN FB 1 2 J1 DNP 1 2 J4 DNP 5 4 1 2 3 6 J11 DNP 5 4 1 2 3 6 J12 DNP VIN VIN EN NR...

Страница 9: ...ne J3 J5 2 Header 2 54 mm 2 1 Gold SMT Header 2 54 mm 2 1 SMT 61000218321 Wurth Elektronik J8 J9 J10 3 Standard Banana Jack Insulated Black 6092 6092 Keystone LBL1 1 Thermal Transfer Printable Labels...

Страница 10: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Страница 11: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Страница 12: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Страница 13: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Страница 14: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Страница 15: ...e resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reprod...

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