Texas Instruments TPS7A14EVM-058, Руководство пользователя, Страница: 4 / 17

2.2.5 J18
J18 is the connection for the function generator to drive the gate driver device. J18 is terminated by the 50-Ω
resistor, R13.
2.2.6 J19
J19 is a high-frequency kelvin connection that allows accurate measurements of the load transient MOSFET
drain to source voltage.
2.2.7 J22
J22 is a high-frequency kelvin connection that allows accurate measurements of the load transient MOSFET
gate to source voltage.
2.2.8 TP2, TP3, and TP4
TP2, TP3, and TP4 allow the user to measure the gate drive resistances R8 and R9 when power is turned off to
the EVM.
2.2.9 TP5
TP5 is the enable pin to enable the gate driver device. Tie this pin to GND to enable the gate driver.
2.3 TPS7A14 LDO Operation
The TPS7A14EVM-058 evaluation module contains the TPS7A14 LDO with input, bias, and output capacitors
installed. These four components provide the minimum required solution size, as illustrated by the white boxes
in
Figure 1-1 . Additional pads are available to test the LDO with additional input, bias, and output capacitors
beyond what is already installed on the EVM. The TPS7A14 LDO can be enabled or disabled by using the J7
3-pin header.
1. Place a 2-pin shunt across the header to tie VIN to EN to enable the device.
2. Place a 2-pin shunt across the header to tie GND to EN to disable the device.
Alternatively, by connecting an external function generator to TP1 (EN) and a nearby GND post (J11), the
user can enable or disable the TPS7A14 LDO after VIN is applied.
Figure 2-1 shows the result of the
TPS7A14EVM-058 during turn on. The blue trace is the enable voltage, and the red trace is the output voltage.
Figure 2-1. TPS7A14EVM-058 Turn On
Setup www.ti.com
4 TPS7A14EVM-058 Evaluation Module SBVU073 – NOVEMBER 2021
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