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Introduction

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2

SLUUC02 – February 2019

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TPS65295EVM-079, 4.5-V to 18-V

IN

, complete DDR4 power solution

evaluation module

3

Jumpers

.......................................................................................................................

4

4

Connection and Test Points

................................................................................................

4

5

List of Materials

.............................................................................................................

14

1

Introduction

The TPS65295 device provides a complete power solution for DDR4 memory system with the lowest total
cost and minimum space. It meets the JEDEC standard for DDR4 power-up and power-down sequence
requirement. The TPS65295 integrates two synchronous buck converters (VPP and VDDQ) and a 1-A
sink and source tracking LDO (VTT) and a buffered low noise reference (VTTREF).

Table 1

displays

detailed input and output information.

The TPS65295 employs D-CAP3™ mode coupled with 600-kHz switching frequency for ease-of-use, fast
transient, and support for ceramic output capacitors without an external compensation circuit. The
VTTREF tracks ½ VDDQ within excellent 0.8% accuracy. The VTT which provides both 1-A sink and
source continual current capabilities requires only 10-

μ

F of ceramic output capacitor.

The TPS65295 provides rich functions as well as excellent power supply performance. It supports flexible
power state control, placing VTT at high-Z in S3 and discharging VDDQ, VTT, and VTTREF in S4/S5
state. OVP, UVP, OCP, UVLO and thermal shutdown protections are also available. The part is available
in a thermally enhanced 18-pin HotRod™ VQFN package and is designed to operate under the –40°C to
125°C junction temperature range.

The evaluation module is designed to provide access to the features of the TPS65295. Some
modifications can be made to this module to test performance at different input and output voltages,
current and switching frequency. Please contact TI Field Applications Group for advice on these matters.

Table 1. Input Voltage and Output Current Summary

EVM

INPUT VOLTAGE (V

IN

) Range

OUTPUT CURRENT (I

OUT

) RANGE

TPS65295EVM-079

4.5 V to 18 V

I

VDDQ

= 0 A to 8 A, I

VPP

= 0 A to 1 A, I

VTT

= 0 A to 1 A

2

Performance Specification Summary

A summary of the TPS65295EVM-079 performance specifications is provided in

Table 2

The

TPS65295EVM-079 is designed and tested for VIN = 4.5 V to 18V. The Junction temperature is 25°C for
all measurements, unless otherwise noted.

Table 2. TPS65295EVM-079 Performance Specifications Summary

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNIT

V

IN

Input Voltage Range

4.5

18

V

I

OUT

Output Current(VDDQ)

0

8

A

Output Current(VPP)

0

1

Output Current(VTT)

0

1

Output Current(VTTREF)

0

0.01

F

SW

Switching Frequency(VDDQ)

600

KHz

Switching Frequency(VPP)

580

V

OUT

VDDQ

1.188

1.2

1.212

V

VPP

2.45

2.5

2.55

VTT

VTTREF

VTTREF

1/2VDDQ

Содержание TPS65295

Страница 1: ...Response 5 3 5 Output Voltage Ripple 6 3 6 Power Up 7 3 7 Power Down 7 4 Board Layout 8 5 Board Profile Schematic List of Materials and Reference 11 5 1 Board Profile 11 5 2 Schematic 13 5 3 List of M...

Страница 2: ...T at high Z in S3 and discharging VDDQ VTT and VTTREF in S4 S5 state OVP UVP OCP UVLO and thermal shutdown protections are also available The part is available in a thermally enhanced 18 pin HotRod VQ...

Страница 3: ...M 079 4 5 V to 18 VIN complete DDR4 power solution evaluation module 3 Test Setup and Results This section describes how to properly connect set up and use the TPS65295EVM 079 The section also include...

Страница 4: ...enable SLP_S4 pin J11 VTT enable VTT_CNTL pin Buck converter outputs are white and have a label for each location Close to any of these test points there are black ground test points to allow for DVM...

Страница 5: ...voltage to J2 and J4 If PVIN_VPP and VCC_5V share same power supply apply the power at J4 first and then apply J2 If PVIN_VPP and VCC_5V don t share same power supply apply the power at J4 and J2 firs...

Страница 6: ...Instruments Incorporated TPS65295EVM 079 4 5 V to 18 VIN complete DDR4 power solution evaluation module 3 5 Output Voltage Ripple The TPS65295EVM 079 output voltage ripple is shown in Figure 4 and Fi...

Страница 7: ...ted TPS65295EVM 079 4 5 V to 18 VIN complete DDR4 power solution evaluation module 3 6 Power Up The TPS65295EVM 079 power up waveform relative to SLP_S4 is shown in Figure 6 Figure 6 TPS65295EVM 079 P...

Страница 8: ...routing should be as short as possible to minimize EMI and should be a width plane to carry big current enough vias should be added to the PGND connection of output capacitor and also as close to the...

Страница 9: ...t 9 SLUUC02 February 2019 Submit Documentation Feedback Copyright 2019 Texas Instruments Incorporated TPS65295EVM 079 4 5 V to 18 VIN complete DDR4 power solution evaluation module Figure 9 Top Layer...

Страница 10: ...0 SLUUC02 February 2019 Submit Documentation Feedback Copyright 2019 Texas Instruments Incorporated TPS65295EVM 079 4 5 V to 18 VIN complete DDR4 power solution evaluation module Figure 11 Inner2 Laye...

Страница 11: ...ntation Feedback Copyright 2019 Texas Instruments Incorporated TPS65295EVM 079 4 5 V to 18 VIN complete DDR4 power solution evaluation module 5 Board Profile Schematic List of Materials and Reference...

Страница 12: ...SLUUC02 February 2019 Submit Documentation Feedback Copyright 2019 Texas Instruments Incorporated TPS65295EVM 079 4 5 V to 18 VIN complete DDR4 power solution evaluation module Figure 14 is the bottom...

Страница 13: ...C02 February 2019 Submit Documentation Feedback Copyright 2019 Texas Instruments Incorporated TPS65295EVM 079 4 5 V to 18 VIN complete DDR4 power solution evaluation module 5 2 Schematic Figure 15 is...

Страница 14: ...J8 J9 5 Terminal block 3 5 mm pitch 2x1 TH ED555 2DS On Shore Technology J4 J5 2 Terminal block 5 08 mm 2x1 Brass TH ED120 2DS On Shore Technology J10 J11 2 Header 100 mil 3x1 Gold TH PBC03SAAN Sulli...

Страница 15: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Страница 16: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Страница 17: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Страница 18: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Страница 19: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Страница 20: ...e resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reprod...

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