Texas Instruments TPS65261EVM-650 Скачать руководство пользователя страница 3

0.047µF

C11

10µF

C9

82pF

C5

0.01µF

C17

3300pF

C6

22pF

C4

0

R8

20.0k

R3

22pF

C15

1µF

C10

4.7µH

L2

1
2
3

J5

22µF

C12

GND

GND

GND

GND

GND

1
2
3

J8

100k

R21

51k

R25

GND

10µF

C7

10µF

C8

0

R10

DNI

TP11

0.047µF

C18

0

R15

4.7µH

L3

22µF

C21

GND

0

R16

DNI

TP14

22pF

C25

GND

4.7µH

L1

22µF

C3

22µF

C2

0

R2

GND

0.047µF

C1

0

R1

GND

1

2

J3

GND

TP12

TP13

EN1
EN2
EN3

MODE

1
2

J2

GND

TP6

TP15

1
2

J1

GND

TP1

TP3

DNI

TP4

EN1

MODE

GND

GND

1
2

J4

GND

TP2

TP5

VIN

VIN

10.0k

R5

10.0k

R6

10.0k

R13

DNI

C26

VOUT1 1.2V 3A

VOUT2 3.3V 2A

VOUT3 1.8V 2A

VIN 12V

GND

VFB1

VFB1

22µF

C13

GND

VFB2

VFB2

VFB3

22pF

C14

GND

22µF

C22

GND

VFB3

22pF

C23

GND

GND

0.01µF

C19

0.01µF

C20

GND

73.2k

R17

20.0k

R7

GND

100k

R11

TP9

TP8

100k

R9

V7V

V7V

1
2
3

J6

100k

R22

51k

R26

GND

EN2

GND

DNI

C27

1
2
3

J7

100k

R23

51k

R27

GND

EN3

GND

DNI

C28

V7V

GND

10.0k

R19

20.0k

R20

45.3k

R14

30k

R12

30k

R18

2200pF

C16

2200pF

C24

147k

R4

TP7

GND

TP10

PGOOD

2

MODE

4

FB2

6

EN2

32

BST2

9

LX2

10

PGND2

11

PVIN2

12

PVIN3

13

PGND3

14

LX3

15

BST3

16

FB3

19

AGND

21

V7V

5

COMP1

23

SS1

24

FB1

22

EN1

31

BST1

25

LX1

26

PGND1

27

PVIN1

28

VDIV

30

PAD

RESET

3

COMP2

7

COMP3

18

SS2

8

SS3

17

ROSC

20

VIN

29

EN3

1

U1

TPS65261RHB

VDIV

VDIV

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TPS65261 Schematic

2

TPS65261 Schematic

Figure 1

shows the EVM schematic.

Figure 1. TPS65261 Schematic

3

SLVUA85 – June 2014

TPS65261EVM-650 PMIC 3-A, 2-A, 2-A Output Current Evaluation Module

Submit Documentation Feedback

Copyright © 2014, Texas Instruments Incorporated

Содержание TPS65261EVM-650

Страница 1: ...65261 Schematic 3 3 Board Layout 4 4 Bench Test Setup Conditions 6 5 Power Up Procedure 7 6 Bill of Materials 8 List of Figures 1 TPS65261 Schematic 3 2 Component Placement Top Layer 4 3 Board Layout...

Страница 2: ...r the EVM Table 1 Summary of Performance Test Conditions Performance VIN 4 5 V to 18 V BUCK1 1 2 V up to 3 A fSW 600 kHz BUCK2 3 3 V up to 2 A 25 C ambient BUCK3 1 8 V up to 2 A RESET pull low when VD...

Страница 3: ...ND 0 01 F C19 0 01 F C20 GND 73 2k R17 20 0k R7 GND 100k R11 TP9 TP8 100k R9 V7V V7V 1 2 3 J6 100k R22 51k R26 GND EN2 GND DNI C27 1 2 3 J7 100k R23 51k R27 GND EN3 GND DNI C28 V7V GND 10 0k R19 20 0k...

Страница 4: ...e 2 illustrates the PCB layout for this EVM Figure 2 Component Placement Top Layer 4 TPS65261EVM 650 PMIC 3 A 2 A 2 A Output Current Evaluation Module SLVUA85 June 2014 Submit Documentation Feedback C...

Страница 5: ...VM Figure 3 Board Layout Top Layer Figure 4 Board Layout Second Layer Figure 5 Board Layout Third Layer Figure 6 Board Layout Bottom Layer 5 SLVUA85 June 2014 TPS65261EVM 650 PMIC 3 A 2 A 2 A Output C...

Страница 6: ...escription and jumper placement on the EVM Figure 7 Header Descriptions and Jumper Placement Test points A LX of VOUT1 B LX of VOUT2 C LX of VOUT3 VOUT1 VOUT2 VOUT3 VIN PGOOD RESET V7V 6 TPS65261EVM 6...

Страница 7: ...ble VOUT3 connect EN3 to VIN through a 100 k resistor to enable VOUT3 leave open to enable VOUT3 J8 Mode Power sequencing mode control pin Connect this pin to GND to set power sequence with dedicated...

Страница 8: ...Printable Labels 0 650 W x 0 200 H 10 000 per roll PCB Label 0 650 H x 0 200 W THT 14 423 10 Brady R1 R2 R8 R10 R15 6 0 RES 0 ohm 5 0 1W 0603 0603 CRCW06030000Z0EA Vishay Dale R16 R3 R7 R20 3 20 0k RE...

Страница 9: ...sponsible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related inf...

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