Connector and Test Point Descriptions
4
Connector and Test Point Descriptions
4.1
Input / Output Connector Descriptions
4.1.1
J1: VINLDO1, 2, GND
J1 pin 1 is the input supply for LDO1 and LDO2. In the default configuration, VINLDO1,2 is connected to
SYS with R1. To connect VINLDO1,2 to any other voltage source, remove R1 and connect the
VINLDO1,2 supply between J1 pin 1 (positive connection) and J1 pin 2 (GND connection).
4.1.2
J2: AC, GND
A power supply can be connected between J2 pin 1 (AC) and J2 pin 2 (GND). The AC pin is one of the
EVM inputs. Note that the voltage rating on the AC pin ranges from 4.3 V up to 17 V. The allowable
voltage range on both the AC and USB pins for charging is from 4.3 V up to 5.8 V. If the voltage on the
AC pin exceeds 5.8 V, the charger goes into overvoltage lockout.
The input current on the Power Path input AC pin is current-limited. The current limit can be changed in
User Register PPATH1 (01h). The default input current limit is set to 2500 mA. For more information, refer
to the
, available for download at
.
4.1.3
J3: USB, GND
Connect your power supply positive terminal to J3 pin 1. Connect your power supply negative terminal to
J3 pin 2. Note that the voltage rating on the USB input ranges from 4.3 V up to 17 V. The allowable
voltage range on both the AC and USB pins for charging is from 4.3 V up to 5.8 V. If the voltage on the
AC pin exceeds 5.8 V, the charger goes into overvoltage lockout.
The input current on the Power Path input USB pin is current-limited. The current limit can be changed in
User Register PPATH1 (01h). The default input current limit is set to 500 mA. For more information, refer
to the
, available for download at
.
4.1.4
J4: SYS
J4 is connected to the output of the Power Path (SYS). When the TPS6507x device is turned off and there
is no voltage source applied at either the AC or USB pins, the SYS output is disconnected internally from
the battery. When the TPS6507x is turned on by pulling PB_IN low, the voltage at SYS ramps up. If there
is no voltage applied at either the AC or USB pin, SYS remains connected to VBAT internally. If there is a
voltage applied at either the AC or USB pin, SYS is connected to this input. If both input supplies are
connected, the AC input has priority. The voltage at SYS is not regulated.
4.1.5
J5: GND
J5 is connected to GND.
4.1.6
J6: VBAT, GND, TS
Connect your single-cell Li-Ion or Li-Polymer cell positive connection to J6 pins 1 and 2. Connect your
battery negative connection between J6 pins 3 and 4. If your battery provides a thermistor (NTC)
connection, you can connect the thermistor to J6 pin 5. Note that the factory default EVM configuration
includes a 10-k
Ω
resistor connected from TS to GND (R5). If you wish to use the battery internal resistor,
R5 must first be removed. The thermistor type is defined in User Register CHGCONFIG1 with the bit
SENSOR TYPE. Two different thermistor types can be selected: 100 k
Ω
and 10 k
Ω
; the default selection
is 10 k
Ω
.
A resistor in parallel to the thermistor (NTC) is required for linearization (see the
for
details). Note that the factory default EVM configuration uses a 75-k
Ω
resistor for linearization (R6).
8
TPS6507xEVM
SLVU291B
–
April 2010
–
Revised September 2011
Copyright
©
2010
–
2011, Texas Instruments Incorporated