)
R
R
(
)
VLDO
REF
_
V
(
))
R
R
(
REF
_
V
DCDC
_
Vout
3
1
2
2
1
1
2
´
-
+
+
´
=
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Input/Output Connector Description
4. Connect the ribbon cable between the EVM and the USB-TO-GPIO (HPA172) adapter.
5. Connect the USB cable between the computer and the HPA172EVM.
6. Turn on all supplies.
7. Run the TPS65023B/TPS650231EVM software
3.2
Modifications
3.2.1
Setting the Output Voltage
The TPS65023B features two default output voltages. These output voltages can be selected by pulling
DEFDCDC2 high – selecting the higher default output voltage – or pulling DEFDCDC2 low – selecting the
lower default output voltage.
In addition, the output voltage of DCDC2 can be externally adjusted with the resistor divider network R3
and R6. The default configuration of the TPS65023BEVM-664 is that R3 and R6 are not assembled. The
default output voltage of DCDC2 can be selected with JP2.
Note that the default output voltage is selected once at startup of the device. Changing logic level of
DEFDCDC2 during operation does not affect the output voltage and is not allowed.
3.2.2
Setting the Output Voltage for DCDC2, TPS650231
The TPS650231 does not feature these default output voltages. The output voltages of DCDC2 is
externally adjustable only. The default configuration of the TPS650231EVM-664 is that R3 and R6 are not
assembled. JP2 is not assembled.
TPS650231 does not have the default output voltage feature, and this provides the benefit of external
voltage scaling options.
3.2.3
Simple Two-Point Voltage Scaling, TPS650231
DCDC2 does not have the previously described preset default output voltages. An external voltage scaling
circuit is on the EVM, and the output voltage of DCDC2 can be switched between two preset voltages.
This useful feature reduces the power consumption of an application processor in Low Power mode.
The voltage scaling circuit consists of JP2,Q1, R3, R6, and R24. The circuit uses a transistor (Q1) to
connect a resistor (R24) in parallel to the lower resistor of the feedback network (R6) of DCDC2.
Modifying the resistor network by paralleling R24 and R6 reduces the overall resistance of the lower
resistor and therefore increases the output voltage of the DC/DC converter. See
Equation 1
and
Equation 2
to design R24. In the factory configuration, the components JP2, Q1, and R24 are not
assembled on the board.
3.2.4
Scaling the Output Voltage of DCDC2 From LDO2
Another approach to scale the DC/DC converter output voltage is to use an external adjustable voltage.
Any external adjustable voltage source can be used, e.g., output voltage of an digital-to-analog converter.
In the TPS65023B/TPS650231, LDO1 and LDO2 can be adjusted via I2C. The TPS65023B/TPS650231
provides the ability to feed the output voltage of LDO2 back to the resistor divider network, using R25, and
therefore scale the output voltage of DCDC2 based on the LDO2 output voltage.
In this configuration, R25, R3, and R6 need to be assembled. R24, R26, Q1, and R3 need to be removed.
(1)
From
Equation 2
it can be seen that maximum DCDC1 output voltage occurs for minimum VLDO2, and
minimum DCDC1 output voltage occurs for maximum VLDO2.
To ensure that the desired DCDC1 output voltages can be adjusted, design the resistors R25, R3, and R6
according to and
Equation 2
and
Equation 2
.
5
SLVU394 – October 2010
TPS65023B/TPS650231EVM
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