Schematic
3-4
Figure 3–3. Bottom Layer
3.3
Schematic
Figure 3–4. TPS6110x EVM Circuit Diagram
R
7
TPS6110xRGE
OUTPUT
GND
VBAT
LBI
ADEN
EN
SWN
ENPB
ENLDO
SKIPEN
VOUT
LDOIN
FB
LDOOUT
PGOOD
LBO1
LBO2
SWP
LDOSENSE
PGND
C
6
C
4
C
5
R
8
R
9
U
1
R
1
R
2
C
3
L
1
10
µ
F
10
µ
H
2.2
µ
F
100
µ
F
2.2
µ
F
LBO1
LBO2
PGOOD
INPUT
SKIPEN
ADEN
EN
ENPB
ENLDO
R
11
R
10
R
6
R
3
R
5
R
4
LDOOUT
Содержание TPS6110XEVM-216
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