Texas Instruments TPS54373EVM-237 Скачать руководство пользователя страница 29 | Manualshive

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Texas Instruments TPS54373EVM-237 Скачать руководство пользователя страница 29

3-1

Board Layout

Board Layout

This chapter provides a description of the TPS54373EVM–237 board layout
and layer illustrations.

Topic

Page

3.1

Layout

3-2

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Chapter 3

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Содержание TPS54373EVM-237

Страница 1: ...June 2003 PMP Systems Power User s Guide SLVU088...

Страница 2: ...itute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual p...

Страница 3: ...handling or use of the goods Please be aware that the products received may not be regulatory compliant or agency certified FCC UL CE etc Due to the open construction of the product it is the user s r...

Страница 4: ...ting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation some circuit components may have case temperatures...

Страница 5: ...Results Chapter 3 Board Layout Chapter 4 Schematic and Bill of MAterials Information About Cautions and Warnings This book may contain cautions and warnings This is an example of a caution statement A...

Страница 6: ...Information About Cautions and Warnings vi Trademarks SWIFT is a trademark of Texas Instruments PowerPAD is a trademark of Texas Instruments...

Страница 7: ...1 Input Output Connections 2 2 2 2 Efficiency 2 3 2 3 Power Dissipation 2 4 2 4 Output Voltage Regulation 2 5 2 5 Load Transients 2 6 2 6 Loop Characteristics 2 7 2 7 Output Voltage Ripple 2 8 2 8 Inp...

Страница 8: ...2 9 2 11 Measured Start Up Waveform TPS54373 With No Precharge 2 10 2 12 Measured Start Up Waveform Two Diode Precharge 2 11 2 13 Measured Start Up Waveform Three Diode Precharge 2 11 2 14 Measured St...

Страница 9: ...port documentation for the TPS54373EVM 237 evaluation module SLVP237 The TPS54373EVM 237 performance specifications are given with the schematic and bill of material for the TPS54373EVM 237 Topic Page...

Страница 10: ...f the TPS54373 are incorporated inside the TPS54373 package This eliminates the need for external MOSFETs and their associated drivers The low drain to source on resistance of the MOSFETs gives the TP...

Страница 11: ...operating range of the TPS54373 device Table 1 2 TPS54373EVM 237 Performance Specification Summary Specification Test Conditions Min Typ Max Units Input voltage range 3 0 3 3 or 5 0 6 V Output voltage...

Страница 12: ...W 0 891 V V O 0 891 V Table 1 3 Output Voltage Programming Output Voltage V R2 Value k 0 9 1000 1 2 28 7 1 5 14 7 1 8 9 76 2 5 5 49 3 3 3 74 The minimum output voltage is limited by the minimum contro...

Страница 13: ...primary intended usage for the TPS54373 device family is in applications requiring a precharge condition on the output These types of applications include power supplies for DSPs and microprocessors...

Страница 14: ...oes not begin switching If a voltage transient on the precharge voltage source causes the series diodes to conduct current may be sunk through the low side FET in the device possibly damaging the devi...

Страница 15: ...the TPS54373EVM 237 and covers efficiency output voltage regulation load transients loop response output ripple input ripple and start up Topic Page 2 1 Input Output Connections 2 2 2 2 Efficiency 2 3...

Страница 16: ...or In typical applications it is usually located close to the input voltage source When using the TPS54373EVM 237 with an external power supply as the source for VI an additional bulk capacitor may be...

Страница 17: ...emperature of 25 C The efficiency is lower at higher ambient temperatures due to temperature variation in the drain to source resistance of the MOSFETs The efficiency is slightly lower at 700 kHz than...

Страница 18: ...junction temperature is approximately 60 C while the case temperature is approximately 55 C The total circuit losses at 25 C are shown in Figure 2 3 Power dissipation is shown for input voltages of 3...

Страница 19: ...5 Measurements are given for an ambient temperature of 25 C Figure 2 4 Load Regulation 0 5 0 4 0 3 0 2 0 1 0 0 1 0 2 0 3 0 4 0 5 0 0 5 1 1 5 2 2 5 3 3 5 Output Voltage Change OUTPUT VOLTAGE vs OUTPUT...

Страница 20: ...ad transients is shown in Figure 2 6 The current step is from 25 to 75 of maximum rated load Total peak to peak voltage variation is as shown including ripple and noise on the output Figure 2 6 Load T...

Страница 21: ...ge Figure 2 7 Measured Loop Response TPS54373 VI 3 V 60 50 40 30 20 10 0 10 20 30 40 50 60 100 1 k 10 k 100 k 1 M 180 150 120 90 60 30 0 30 60 90 120 150 180 Gain Phase Gain dB f Frequency Hz MEASURED...

Страница 22: ...oltage ripple is shown in Figure 2 9 The input voltage is 3 3 V for the TPS54373 Output current is the rated full load of 3 A Voltage is measured directly across output capacitors Figure 2 9 Measured...

Страница 23: ...Ripple The TPS54373EVM 237 output voltage ripple is shown in Figure 2 10 The input voltage is 3 3 V for the TPS54373 Output current for each device is rated full load of 3 A Figure 2 10 Input Voltage...

Страница 24: ...hes up with the slow start ramp rate At this point the voltage on the VSENSE pin matches the internal reference and the output continues to ramp up to the final set point value of 1 8 V at the slow st...

Страница 25: ...nd Results Figure 2 12 Measured Start Up Waveform Two Diode Precharge VI 500 mV div Time Scale 5 ms div VO 500 mV div Figure 2 13 Measured Start Up Waveform Three Diode Precharge VI 500 mV div Time Sc...

Страница 26: ...rop across the diodes and the final precharge voltage As in the previous example when the internal reference exceeds the voltage fed back to the VSENSE pin the output begins to ramp up to its final pr...

Страница 27: ...Start Up 2 13 Test Setup and Results Figure 2 15 Measured Start Up Waveform Four Diode Precharge and No Load VI 500 mV div Time Scale 5 ms div VO 500 mV div...

Страница 28: ...2 14...

Страница 29: ...3 1 Board Layout Board Layout This chapter provides a description of the TPS54373EVM 237 board layout and layer illustrations Topic Page 3 1 Layout 3 2 Chapter 3...

Страница 30: ...with ground The bottom layer contains ground and VO copper areas some signal routing and pads for two optional D3 or D4 case size electrolytic capacitors The top and bottom ground traces are connected...

Страница 31: ...Layout 3 3 Board Layout Figure 3 2 Bottom Side Layout looking from top side Figure 3 3 Top Side Assembly...

Страница 32: ...3 4...

Страница 33: ...ematic and Bill of Materials Schematic and Bill of Materials The TPS54373EVM 237 schematic and bill of materials are presented in this chapter Topic Page 4 1 Schematic 4 2 4 2 Bill of Materials 4 3 Ch...

Страница 34: ...PwrPad TPS54373PWP U1 J1 2 1 Vin GND C1 C10 10 F TP2 TP3 TP1 R3 6 34 k C6 1500 pF C7 82 pF TP10 C3 0 047 F R6 10 k R5 590 R1 10 k R2 9 76 k C8 820 pF TP8 R7 0 TP4 C15 C16 R8 2 4 L1 1 H C14 3300 pF C2...

Страница 35: ...pin 100 mil spacing 36 pin strip 0 100 x 2 Sullins PTC36SAAN 3 Shunt 100 mil black 0 100 3M 929950 00 1 L1 Inductor SMT 1 0 H 8 5 A 10 m 0 270 sq Vishay IHLP 2525CZ 01 1 R1 R6 Resistor chip 10 0 k 1 1...

Страница 36: ...4 4...

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