3.7 Synchronizing to a Clock
shows U1 and U2 synchronized to an external clock of 1.25 MHz at the SYNC test point. To
synchronize to the clock at the SYNC test point, place a shunt on the ENSYNC_U1 or ENSYNC_U2 jumper or
jumpers to enable the output of the buffers.
shows the transitions to and from synchronizing to an external clock with 6-A load. 16 pulses with
a frequency of 1-MHz were sent to the SYNC testpoint on the EVM. In this waveform, after four pulses, the
TPS543620 begins synchronizing to the clock. After the clock goes away, the TPS543620 switches at 70% of
the internal clock frequency for four pulses then transitions back to the normal internal clock frequency. There is
only a small variation in the output voltage during these transitions.
Time (1 µs/div)
SW_U1 (5 V/div)
SW_U2 (5 V/div)
SYNC (2 V/div)
Figure 3-24. U1 and U2 Synchronized to a Clock
Time (4 µs/div)
VOUT AC (10 mV/div)
SW (5 V/div)
SYNC (5 V/div)
Figure 3-25. U2 Clock Synchronization Transitions
Test Setup and Results
SLVUBQ1A – AUGUST 2020 – REVISED MAY 2021
TPS543620 SWIFT™ Step-Down Converter Evaluation Module User's Guide
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