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2.7
Input Voltage Ripple
V
= 100 mV/div (ac Coupled)
O
PH = 10 V/div
Time = 1 s/div
m
2.8
Powering Up
t - Time = 5 ms/Div
V
= 2 V/Div
OUT
V
= 10 V/Div
IN
Test Setup and Results
The TPS5420EVM-175 input voltage ripple is shown in
Figure 7
. The input voltage is VIN = 10 V for the
TPS5420. Output current for each device is at full rated load of 2 A.
Figure 7. Input Voltage Ripple, TPS5420
The TPS5420EVM-175 start-up waveforms are shown in
Figure 8
and
Figure 9
. In
Figure 8
the top trace
shows VIN whereas the bottom trace shows VOUT. VIN increases from 0 V toward 25 V. When the input
voltage reaches the internally set UVLO threshold voltage of 5.3 V, the slow-start sequence begins. The
internal reference begins to ramp up linearly at the internally set slow-start rate towards 1.221 V, and the
output ramps up toward the set voltage of 5 V. The output may be inhibited by using a jumper at JP1 to tie
ENA to GND. When the jumper is removed, ENA is released and the slow-start sequence begins as
shown in
Figure 9
. The top trace shows the ENA signal and the bottom trace shows VOUT. When the
ENA voltage reaches the enable-threshold voltage of 1.06 V, the start-up sequence begins as described
above.
Figure 8. Power Up, VOUT Relative to VIN
SLVU163 – April 2006
TPS5420EVM-175 SWIFT™ Regulator Evaluation Module
7
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