5
Board Layout
5.1
Layout
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Board Layout
This chapter provides the TPS54160EVM-230 board layout and illustrations.
through
show the layout for each layer of the TPS54160 EVM. The top and bottom
layers of the board are 2-oz. copper and the internal layers are 1-oz. copper. The top layer is
predominantly used to route the high current traces of the input and output voltages. Some noise sensitive
traces, such as the feedback trace, have been routed on the bottom layer so that they are shielded by the
large ground plane on the bottom layer. The two inner layers do not have any traces routed on them but
do provide additional heat sinking for the ICs.
Board layout is critical for all high frequency switch mode power supplies. The nodes with high switching
frequencies and currents are kept as short as possible to minimize trace inductance. Careful attention has
been given to the routing of high frequency current loops and a single point grounding scheme is used.
Refer to the datasheet for specific layout guidelines.
SLVU270 – September 2008
TPS54160EVM-230
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