Texas Instruments TPS51125AEVM, Руководство пользователя, Страница: 6 / 15

6 Physical Layouts
This section provides the board layout and assembly drawings for the EVM, that include the top layer ( Figure
6-1 ), the bottom layer ( Figure 6-2 ), and inner layer views ( Figure 6-3 and Figure 6-4 ) of the EVM.
Figure 6-1. Top Layer Routing
Figure 6-2. Bottom Layer Routing
Physical Layouts www.ti.com
6 TPS51125A Buck Controller Evaluation Module User's Guide SLUU408A – FEBRUARY 2010 – REVISED JANUARY 2022
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