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SLUU130A – September 2002 – Revised February 2003

TPS40003-Based 5-A Converter in Less Than One Square Inch

List of Material

Table 1 lists the components used in this design. With minor component tweaks this design could be modified
to meet a wide range of applications.

Reference

Qty

Description

Manufacturer

Part Number

Capacitor

C1, C2, C5, C6

Ceramic, 22

F, 6.3 V, X5R, 20%, 1210

Panasonic

ECJ–4YB0J226M

C10

Ceramic, 0.001

F, 10 V, X5R, 10%, 805

Panasonic

ECJ–2YB1A105K

C11

Ceramic, 0.0047

F, 50 V, X7R, 10%

Vishay

VJ0603Y472KXAAT

C12

Ceramic, 470 pF, 50 V, X7R, 10%

Vishay

VJ0603Y471KXAAT

Ceramic, 0.1

F, 50 V, X5R, 10%

Vishay

VJ0805Y104KXAAT

Ceramic, 0.001

F, 50 V, X7R, 10%

Vishay

VJ0603Y102KXAAT

Ceramic, 68 pF, 50 V, NPO, 10%

Vishay

VJ0603A680KXAAT

Ceramic, 0.0033

F, 50 V, X7R, 10%

Vishay

VJ0805Y332KXAAT

Terminal Block

J1, J2

2 pin, 15 A, 5.1 mm

OST

ED1609

Inductor

SMT, 1.0

H, 8.5 A, 10 m

Ω

Vishay

IHLP–2525CZ–01

MOSFET

Dual N–channel, 20 V, 9.4 A, 18 m

Ω

Fairchild

FDS6898A

Resistor

Chip, 15 k

Ω

, 1/16W, 1%

Std

Chip, 8.66 k

Ω

, 1/16 W, 1%

Std

Chip, 2.2

Ω

, 1/10 W, 5%

Std

Chip, 12.1 k

Ω

, 1/16 W, 1%

Std

Chip, 1 k

Ω

, 1/16 W, 1%

Std

Chip, 16.9

Ω

, 1/16 W, 1%

Std

Chip, 3.3

Ω

, 1/16 W, 5%, 603

Std

JACK

TP1, TP3, TP4,

Test point, red

Farnell

240–345

JACK

TP2, TP6

Test point, black

Farnell

240–333

Adaptor

TP5

3.5-mm probe clip (or 131–5031–00)

Tektronix

131–4244–00

Device

Syncronous buck controller, 600 kHz

TPS40003DGQ

Содержание TPS40003

Страница 1: ...User s Guide TPS40003 Based 5 A Converter in Less Than One Square Inch User s Guide ...

Страница 2: ...e handling or use of the goods Please be aware that the products received may not be regulatory compliant or agency certified FCC UL CE etc Due to the open construction of the product it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ...

Страница 3: ...rtainty as to the load specification please contact a TI field representative During normal operation some circuit components may have case temperatures greater than 50 C The EVM is designed to operate properly with certain components above 50 C as long as the input and output ranges are maintained These components include but are not limited to linear regulators switching transistors pass transis...

Страница 4: ...e topside buck switch to reduce conduction losses and increase silicon device utilization Predictive Gate Drive technology controls the delay from main switch turn off to synchronous rectifier turn on and also the delay from rectifier turn off to main switch turn on This allows minimization of the losses in the MOSFET body diodes by reducing conduction and reverse recovery time This user s guide p...

Страница 5: ...SLUU130A September 2002 Revised February 2003 5 TPS40003 Based 5 A Converter in Less Than One Square Inch 3 Schematic Figure 1 Application Diagram for the TPS40002 3 ...

Страница 6: ...r selection is based on allowable input voltage ripple and required RMS current carrying capability In typical buck converter applications the converter is fed from an upstream power converter with its own output capacitance In this converter onboard capacitance is provided to supply the current required during the top MOSFET on time while keeping ripple within acceptable limits For this power lev...

Страница 7: ...this design requires the use of a single SO 8 package which contains dual N channel MOSFETs MOSFETs with an RDS on of 18 mΩ are selected to keep the conduction losses to a manageable amount at full load 4 6 Short Circuit Protection The TPS40003 implements short circuit protection by comparing the voltage across the topside MOSFET while it is on to a voltage dropped from VDD by RLIM due to an inter...

Страница 8: ...le corner frequency fC is situated at 24 kHz and the output capacitor ESR zero is far higher at approximately 1MHz The feedback compensation network is implemented to provide two zeroes and three poles The first pole is placed at the origin to improve dc regulation The first zero is placed at approximately 2 3 fC 18 kHz fz1 1 2 p R2 C4 The second zero is selected at fC fz2 1 2 p ǒR4 R5 Ǔ C12 The t...

Страница 9: ...de where Q1 and L1 come together is very noisy An R C network fitted between this node and ground can help reduce ringing and voltage overshoot on Q1 B This ringing noise should be minimized to prevent it from confusing the control circuitry which is monitoring this node for current limit and Predictive Gate Drive As a starting point the snubber capacitor C9 is generally chosen to be 5 to 8 times ...

Страница 10: ... directly underneath the package whether the package needs to be soldered or not This thermal land usually has vias that help to spread heat to internal copper layers and or the opposite side of the PCB The vias should not have thermal reliefs that are often used on ground planes because this reduces the copper area which transfers heat Additionally the vias should be small enough so that the hole...

Страница 11: ...in figure 4 SLUP182 TP2 TP1 TP4 TP6 TP3 TP5 J1 J2 LOAD VIN VOUT GND GND DVM2 DVM1 SCOPE C DC Power Supply CIN 470 µF or larger 6 3 V or higher low ESR AIEA or OSCON capacitor Place within 2 inches of J1 Input wires 18 gauge or larger short as feasible Output wires 18 gauge or larger short as feasible Resistive load 0 5 Ω 5 W Active Load set for 2 4 A IN Figure 4 ...

Страница 12: ...5 60 65 70 75 80 85 90 95 100 Figure 5 Figure 6 shows the switch node during typical operation at full load Note that there is very minimal body diode conduction in the bottom MOSFET This is a result of using the predictive delay control implementation This technique is able to dynamically change the delays in the MOSFET drive circuit to account for variations in line load and between devices t Ti...

Страница 13: ...r each restart into a short circuit the pulses terminate for a period of approximately 6 ms This causes the input power to collapse to minuscule levels and the circuit is protected t Time 1 ms div 2 V div SHORT CIRCUIT OPERATION Figure 7 Figure 8 shows the output voltage ripple which is approximately half the 24 mV limit t Time 500 ns div 10 mV div OUTPUT VOLTAGE RIPPLE Figure 8 ...

Страница 14: ... 3 V and a load of 0 3 Ω Note that the output is held low until VSS pin 4 goes above 0 12 V and then the output comes up smoothly under closed loop softstart control STARTUP WAVEFORM t Time 200 µs div 1 V div 500 mV div 500 mV div Figure 9 Figure 10 shows the transient response for a fast load step from 1 A to 2 A TRANSIENT RESPONSE t Time 20 µs div 50 mV div Figure 10 ...

Страница 15: ...02 Revised February 2003 15 TPS40003 Based 5 A Converter in Less Than One Square Inch 7 PCB Layout Figures 11 through13 show the top copper layer the bottom copper layer and top assembly layer of SLUP182 Figure 12 Figure 13 ...

Страница 16: ...104KXAAT C4 1 Ceramic 0 001 µF 50 V X7R 10 Vishay VJ0603Y102KXAAT C8 1 Ceramic 68 pF 50 V NPO 10 Vishay VJ0603A680KXAAT C9 1 Ceramic 0 0033 µF 50 V X7R 10 Vishay VJ0805Y332KXAAT Terminal Block J1 J2 2 2 pin 15 A 5 1 mm OST ED1609 Inductor L1 1 SMT 1 0 µH 8 5 A 10 mΩ Vishay IHLP 2525CZ 01 MOSFET Q1 1 Dual N channel 20 V 9 4 A 18 mΩ Fairchild FDS6898A Resistor R1 1 Chip 15 kΩ 1 16W 1 Std Std R2 1 Ch...

Страница 17: ...nt that any license either express or implied is granted under any TI patent right copyright mask work right or other TI intellectual property right relating to any combination machine or process in which TI products or services are used Information published by TI regarding third party products or services does not constitute a license from TI to use such products or services or a warranty or end...

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