1nf
C12
DNP
475k
R20
SH-J9
1
2
3
J9
16.9k
R25
TP26
ILIM LO
ILIM HI
TP17
EN_UV2
TP18
OVP2
TP15
VIN2
TP16
VOUT2
Red
D6
Green
D7
10.0k
R5
TP10
P-LOAD-RTN
TP6
P-LOAD
330pF
C11
VIN2
TP7
I-LOAD
VOUT2
VOUT1
4
7
,8
1
,2
,3
5
,6
,
30V
Q1
CSD17301Q5A
Pin1_CTRL-2
TP22
IMON2
FLTb-2
P-LOAD
2
1
S2
1nf
C6
DNP
475k
R4
SH-J4
1
2
3
J4
TP14
ILIM LO
ILIM HI
TP3
VIN1
TP2
VOUT1
Red
D2
Green
D3
DNP
330pF
C5
VIN1
VOUT1
Pin1_CTRL-1
TP11
IMON
FLTb-1
2
1
S1
0.1µF
C1
TP4
FLTb1
TP20
FLTb2
TP21
PG2
1
2
3
4
J5
VOUT1
VOUT2
SH-J5
DNP
TP12
TP25
TP24
TP13
VIN=2.7V-18V
IIN=0.6A-5.0A
VIN=2.7V-18V
IIN=0.6A-5.0A
VOUT=2.7V-18V
IOUT=0.6A-5.0A
VOUT=2.7V-18V
IOUT=0.6A-5.0A
1
2
3
Q3
DNP
1
2
3
J10
10k
R29
VIN2
100k
R24
SH-J10
DNP
Pin1_CTRL-2
1
2
3
Q2
DNP
10k
R21
VIN1
100k
R15
SH-J6
DNP
Pin1_CTRL-1
PG-1
PG-2
PG-1
PG-1
PG-2
TP1
SYS_PG
TP19
TP23
FLTb-1
Pin1_CTRL-2
VIN1
324k
R8
OVP-2
OVP-2
SH-J1
24.9k
R12
24.9k
R27
100k
R1
100k
R2
100k
R16
100k
R17
20V
D8
B320A-13-F
20V
D4
B320A-13-F
330µF
C10
16V
D9
16V
D5
4.7µF
C2
4.7µF
C3
4.7µF
C8
4.7µF
C9
DEVSLP
1
PGOOD
2
PGTH
3
OUT
4
OUT
5
OUT
6
OUT
7
OUT
8
IN
9
IN
10
IN
11
IN
12
IN
13
EN/UVLO
14
OVP
15
GND
16
ILIM
17
DVDT
18
IMON
19
FLTB
20
PAD
U1
TPS25944ARVC
DEVSLP
1
PGOOD
2
PGTH
3
OUT
4
OUT
5
OUT
6
OUT
7
OUT
8
IN
9
IN
10
IN
11
IN
12
IN
13
EN/UVLO
14
OVP
15
GND
16
ILIM
17
DVDT
18
IMON
19
FLTB
20
PAD
U2
TPS25944LRVC
0.1
R6
1
2
J3
1
2
J8
1
2
J2
1
2
J7
TP9
PG1
0.003
R7
TP5
OVP1
TP8
EN_UV1
475k
R3
475k
R18
475k
R19
16.9k
R9
32.4k
R13
48.7k
R22
DNP
35.7k
R26
47k
R11
47k
R23
EN/UVLO-1
OVP-1
DVDT-1
IMON-1
ILIM-1
PGTH-1
DVDT-2
IMON-2
ILIM-2
PGTH-2
EN/UVLO-2
1
2
3
J6
1
2
3
J1
SGND1
SGND2
Net-Tie
Net-Tie
Net-Tie
Net-Tie
Net-Tie
IMON-1
330µF
C4
16.9k
R10
16.2k
R14
16.2k
R28
Net-Tie
1µF
C7
1
3
2
D1
BAT54C-7-F
Schematic
3
Schematic
illustrates the TPS25944X EVM schematic.
Figure 1. TPS25944XEVM Schematic
4
TPS25944X635EVM: Evaluation Module for TPS25944X
SLUUBC2A – May 2015 – Revised July 2015
Copyright © 2015, Texas Instruments Incorporated
