Texas Instruments TPS2388EVM-612, Руководство пользователя

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General Use Features
7 SLUUBQ7 – August 2017
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TPS2388EVM-612: PoE PSE Evaluation Module for TPS2388
3.3 EVM Test Points
Table 4 lists and describes the EVM test points.
Table 4. EVM Test Points
TP Color Label Description
Motherboard: TPS2388EVM-612
TP1 RED VPWR Used for VPWR
TP2 RED 3.3V Used for TPS2388 VDD
TP3 SMT GND VPWR ground
TP4 WHT SDA I
2
C Data from LaunchPad and USB-TO-GPIO
TP5 WHT SCL I
2
C Clock from LaunchPad and USB-TO-GPIO
TP6 WHT PSE_SDAO I
2
C data out from TPS2388
TP7 WHT PSE_SCL I
2
C clock to TPS2388
TP8 WHT PSE_SDAI I
2
C data in to TPS2388
TP9 BLK GND1 Ground from LaunchPad and USB-TO-GPIO
TP11 SMT TP11 Chassis ground test point
TP14 SMT GND VPWR ground test point
TP15 SMT GND VPWR ground test point
TP16 SMT GND VPWR ground test point
Daughterboard: TPS2388EVM-016
TP2 RED 2P4D Two-pair port 4 DRAIN
TP3 WHT 2P4G Two-pair port 4 GATE
TP4 WHT 4P1AG Four-pair port 1A GATE
TP5 RED 4P1AD Four-pair port 1A DRAIN
TP6 RED 4P1BD Four-pair port 1B DRAIN
TP7 WHT 4P1BG Four-pair port 1B GATE
TP1 BLK GND VPWR ground
TP8 SMT GND VPWR ground
3.4 EVM Test Jumpers
The EVM is equipped with shunts on the jumper positions identified in Table 5 , in the Default Pin Position
column. Shunts can be moved and removed, as required, during use.
(1)
Remove the jumpers on the mother board when doing SIFOS or UNH DC MPS testing.
Table 5. EVM Jumpers
(1)
Jumper Default Pin
Position
Label Description
Motherboard: TPS2388EVM-612
J27 1-2 P1 Two-pair port 1 LED bias
J28 1-2 P2 Two-pair port 2 LED bias
J16 1-2 P3 Two-pair port 3 LED bias
J15 1-2 P4 Two-pair port 4 LED bias
J26 1-2 P5 Four-pair port 1A LED bias
J25 1-2 P6 Four-pair port 1B LED bias
J14 1-2 P7 Four-pair port 2A LED bias
J13 1-2 P8 Four-pair port 2B LED bias
Daughterboard: TPS2388EVM-016
J4 1-2;3-4;5-6;7-8 NA I2C A1-A4 address lines