Setup
5.4
JP2/JP3 - Input Capacitors
During normal operation the shorting jumper is removed on JP3 and JP4. These jumpers connect C1 and
C2 capacitors (unpopulated) from the input of the device to ground. Refer to the Applications Section of
the Datasheet for additional information on selecting the input capacitor.
5.5
JP4/JP5/JP6/JP7 – Output Parallel Connections
JP4-JP7 connects VOUT1 and VOUT2 together and is used when testing both device switches in parallel
configuration.
5.6
TP1/TP2 – VIN1-VIN2
These are input connections to the device.
5.7
TP3/TP4 - VIN Sense, TP7/TP8 - VOUT Sense
These two connections are used when very accurate measurements of the input or output are required.
RON measurements should be made using these sense connections when measuring the voltage drop
from VIN to VOUT and then calculating the resistance.
5.8
TP5/TP6 – VOUT1-VOUT2
These are output connections to the device.
5.9
TP10 – VBIAS
This is the VBIAS connection point. VBIAS must be applied to the TPS22968/68N-Q1 device at a voltage
level of 2.5 V to 5.5 V level for proper operation. VBIAS may be applied direct at this connection point or
applied using JP1.
5.10 TP9/TP11 – ON1-ON2
These are the enable inputs for the device. Apply an external enable/disable source to TP9 and TP11.
The TPS22968/68N-Q1 is active high. ON1 and ON2 must not be left floating. Refer to the datasheet for
proper ON and OFF voltage level settings. A switching signal may also be used and connected at these
points.
5.11 TP12 – VOUT1 // VOUT2
This is the common connection point for VOUT when the switch output are connected in parallel
configuration.
5.12 TP13 – TP17 GND
These are the GND connection points to the EVM.
6
TPS22968/68N-Q1 Dual Channel, 5.5-V, 4-A, 27-m
Ω
Load Switch Evaluation
SLVUAE2A – January 2015 – Revised November 2015
Module
Copyright © 2015, Texas Instruments Incorporated