4-1
EVM Circuit and Layout
The TPA6120A2 EVM layout was carefully planned to minimize the
capacitance and inductance detected by the output and input pins of the
amplifier. Test points are available, but intentionally left unpopulated to keep
signal interference as low as possible.
This chapter includes the EVM layout, the TPA6120A2 EVM component
selection, schematic, and bill of materials.
Topic
Page
4.1
TPA6120A2 EVM Top Layer
4-2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2
TPA6120A2 EVM Bottom Layer
4-3
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3
Component Selection
4-4
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.4
Input Bias Voltage
4-4
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.5
Schematic
4-5
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.6
Bill of Materials
4-6
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 4
Содержание TPA6120A2
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