Texas Instruments TPA3128D2, Руководство пользователя, Страница: 5 / 14

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5 SLOU457 – December 2016
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TPA3128D2 Evaluation Module
Table 5 lists the settings for a single-ended input with auto recovery, Plimit, and PBTL (mono output).
Table 5. TPA3128D2EVM Setting 3
Setting Description
J6 (RIN) R channel audio input
J9 (LIN) No audio input
JP1 (GNDR+) and JP3 (GNDR–), Open R channel on
JP4 (GNDL+) and JP6 (GNDL–), Installed L channel off, PBTL mode
JP2, Installed Single-ended input (R channel)
JP7, Installed Set PLIMIT
R4 Change PLIMIT voltage value
JP8 (SD = FAULT), Installed Auto-recovery mode
J11 (MODESEL = L) Low idle-loss mode
2.8 Separate PVCC/AVCC Supply Support
By supplying a voltage of AVCC which is lower than PVCC (for example, PVCC = 24 V and AVCC = 12
V), the power dissipation on the internal LDO is reduced. This gives customers the flexibility to choose
between extreme low-idle current mode (J3, 1 and 2 set to Short, with separate AVCC) and single power
supply mode (J3, 2 and 3 set to Short, AVCC = PVCC).