Texas Instruments TMS320C80, Руководство пользователя

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Technique #1: Using Only Common RAM
2-7 Programming for Compatibility
2.3.4 Considerations When Using Technique #1
Although PP code that uses this technique should produce identi-
cal results on the ’C80 and ’C82, the timing and performance of
PP-resident programs may be affected by two main differences
between the devices:
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Each ’C82 PP instruction cache is larger than each ’C80 PP
instruction cache.
-
For a given PP, two independently-accessible RAMs (RAM 0
and RAM 1) in the ’C80 occupy the same space as a single
RAM (RAM 0) in the ’C82.
First, since the ’C82 PP instruction cache is twice as large as that
of the ’C80, PP performance on the ’C82 should be better than
PP performance on the ’C80.
Second, the C80 PP’s data RAMs 0 and 1 are independently ac-
cessible RAM modules that can be simultaneously accessed
over the crossbar without contention. In the ’C82, however, the
area of memory corresponding to the ’C80’s data RAMs 0 and 1
is occupied by a single 4-KB RAM module; only a single access
of this module can be performed during any one clock cycle. ’C80
applications may run slightly slower on the ’C82 because this
area of memory can can be accessed only once per clock cycle.
This can occur when software attempts to access data RAMs 0
and 1 simultaneously.
The delays caused by this type of contention are usually negligi-
ble unless a critical inner loop of a PP program written for the ’C80
contains instructions that attempt to access data RAMs 0 and 1
in parallel through the PP’s global and local memory ports. Note
that this is a performance issue only; code that runs correctly on
the ’C80 should produce the same results on the ’C82 despite
any increase in processing time due to contention.
Although the ’C80 contains more total on-chip RAM than the ’C82
(50K bytes versus 44K bytes), the ’C82 dedicates a larger
amount of local RAM to each of its processors. On the ’C82, the
MP has an additional 2048 bytes of parameter RAM; each PP
has an additional 2048 bytes of data RAM and an additional 2048
bytes of parameter RAM. The ’C80 addresses corresponding to
the ’C82’s additional RAM are unpopulated. Similarly, the ’C82
addresses corresponding to the ’C80’s local RAM for PPs 2 and
3 are unpopulated.