17.5.54 USB DMA Select Register (USBDMASEL), offset 0x450
The USB DMA select 32-bit register (USBDMASEL) specifies whether the unmasked interrupt status of the ID
value is valid.
Mode(s):
Host
Device
and described in
Figure 17-66. USB DMA Select Register (USBDMASEL)
31
24
23
20
19
16
Reserved
DMACTX
DMACRX
R/0
R/W-0
R/W-0
15
12
11
8
7
4
3
0
DMABTX
DMABRX
DMAATX
DMAARX
R/W-0
R/W-0
R/W-0
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -
n
= value after reset
Table 17-69. USB DMA Select Register (USBDMASEL) Field Descriptions
Bit
Field
Value
Description
31-24
Reserved
0
Reserved. Reset is 0x0000.000.
23-20
DMACTX
DMA C TX Select specifies the TX mapping of the third USB endpoint on DMA channel 5 (primary
assignment).
0h
Reserved
1h
Endpoint 1 TX
2h
Endpoint 2 TX
3h
Endpoint 3 TX
19-16
DMACRX
DMA C RX Select specifies the RX and TX mapping of the third USB endpoint on DMA channel 4
(primary assignment).
0h
Reserved
1h
Endpoint 1 RX
2h
Endpoint 2 RX
3h
Endpoint 3 RX
15-12
DMABTX
DMA B TX Select specifies the TX mapping of the second USB endpoint on DMA channel 3 (primary
assignment).
0h
Reserved
1h
Endpoint 1 TX
2h
Endpoint 2 TX
3h
Endpoint 3 TX
11-8
DMABRX
DMA B RX Select Specifies the RX mapping of the second USB endpoint on DMA channel 2 (primary
assignment).
0h
Reserved
1h
Endpoint 1 RX
2h
Endpoint 2 RX
3h
Endpoint 3 RX
Universal Serial Bus (USB) Controller
SPRUH18I – JANUARY 2011 – REVISED JUNE 2022
TMS320x2806x Microcontrollers
1137
Copyright © 2022 Texas Instruments Incorporated
Содержание TMS320 2806 Series
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