4 Circuitry
This section summarizes the EVM subsystems and their components. See
for the location of each
subsystem on the PCB.
4.1 Power Block
This block is used to provide power to the PCB. J1 is a micro-USB connector used to conveniently power the
EVM, but a supply may also be used with any of the GND or VCC test points (TP1-TP4). Note that there are
also GND and VCC test points at the bottom of the PCB for convenience. C9 is a bypass capacitor used to help
mitigate noise when powering the device from the micro-USB connector.
4.2 Hall Device Block
This block has the sensing devices, with any needed components, test points and LED indicators. The magnets
are placed in this section to interact with the Hall sensors.
4.2.1 TMAG5110 Side
U1 is the TMAG5110 which is a dual Hall latch with a quadrature output. C1 is a bypass capacitor that is placed
near the sensor to help mitigate power supply noise and provide current quickly to the device when needed. R1
and R2 are pull up resistors since the device output is open drain. Note that a different resistance can be used
for these resistors, based on the system speed and power requirements.
The TMAG5110 outputs can be directly monitored or used with the included test points TP5 and TP6 (for OUT2
and OUT1, respectively). D21 and D22 show the logic state of each output. R3 and R4 are current limiting
resistors to control the brightness of the LEDs.
4.2.2 TMAG5111 Side
U11, C11, R27, R28, TP7, TP8, D23, D24, R29, and R30 perform the same functions as the respective
components from the TMAG5110, except that U11 is the TMAG5111 which is a dual Hall latch with speed and
direction output.
4.3 Quadrature Decoder Block
This block is used to process data to prepare the signal for the up/down counter block.
4.3.1 TMAG5110 Side
U2 is the LS7184N-S, which is a quadrature encoder to counter interface chip. This chip converts the outputs of
the TMAG5110 to use directly with an up/down counter by outputting a speed pulse and a direction. Pin 6 is left
floating to put the device in x4 mode, which gives a speed pulse for both rising and falling edges of each output
from the TMAG5110. R5 is the RBIAS resistor which is used to adjust the output clock pulse width T
OW
. In this
case, 470 kΩ was used to set approximately 5.5-µs T
OW
. C2 is a bypass capacitor that is placed near the IC to
help mitigate power supply noise and provide current quickly to the device when needed.
4.3.2 TMAG5111 Side
Quadrature decoding is not needed for the TMAG5111.
4.4 Up/Down Counter Block
This block is used to convert direction and count data to a binary coded decimal (BCD) number from 0–9.
4.4.1 TMAG5110 Side
U3 is the CD74HC190, which is a BCD up/down counter. This counter only counts on the rising edge of the
pulse sent from the quadrature decoder (U2). The pre-settable pins are set to GND to give an initial value of
0. C3 is a bypass capacitor that is placed near the IC to help mitigate power supply noise and provide current
quickly to the device when needed. C8 and R6 create an RC filter which are used with a single Schmitt-Trigger
buffer (U8, SN74LVC1G17) to delay the LOAD signal for the up/down counter (U3). This is done so that the
initial value of 0 is loaded to the counter after the device has been powered on.
Circuitry
SLYU050B – JUNE 2020 – REVISED JULY 2021
TMAG5110-5111EVM Evaluation Module
11
Copyright © 2021 Texas Instruments Incorporated