Glitch Immunity V
IT-
(t
GI_VIT-
) = 10
s
Glitch Immunity Overdrive > 5%
VDD / SENSE
RESET
Figure 4-1. TLV841EVM Glitch Immunity
4.3 Monitoring Voltage on VDD (TLV841M and TLV841C)
The TLV841M and TLV841C device variant options monitor the voltage via the VDD pin. The EVM provides
jumper J2 and test point TP1 for connecting the power supply input to the VDD pin. If the voltage on this pin
drops below V
IT-
, RESET is asserted low. The VDD pin is connected internally to a comparator through an
internal resistor divider at the positive input and the negative input is connected to an internal reference. The
internal resistor divider is set to provide the input voltage threshold to cause a reset, V
IT-
, that corresponds to
the chosen voltage option variant. Please see the Device Comparison Table in the
datasheet for more
information on the different voltage device variants.
4.4 Manual Reset (MR) (TLV841M)
The TLV841M device variant option offers a Manual Reset (MR) pin that is utilized via jumper J8 (short pin 1
[MR] to pin 2 [GND]). If a shunt jumper is placed on jumper J8, the RESET pin is asserted and forced into a low
state. After the shunt jumper is removed and VDD is above its reset threshold, MR returns to a logic high due
to the internal pull-up resistor, and RESET is de-asserted to a logic high after the user-defined delay expires. If
jumper J8 is left floating, the device operates normally as the MR pin defaults to a logic high via internal pull-up
resistor. Pin 1 of jumper J8 can also be connected to a control signal to set the logic level on MR pin. If pin 1 on
jumper J8 is a logic low, the device asserts a reset. There is also test point TP3 connected directly to the MR pin
in case the user wants to monitor the MR pin.
4.5 Reset Output (RESET)
The TLV841EVM comes populated with
TL841SADL01YBHR
device variant which has an open-drain, active-
low output topology for the RESET pin. The other device variants provide different output topolgies and can be
used on this EVM. Note: if using a TLV841 device variant with push-pull output topology, the pull-up resistor
must be disconnected by leaving jumper J1 open. The TLV841EVM provides an option to apply a separate
pull-up voltage by leaving jumper J1 open and connecting the pull-up voltage to pin 2 [V
PU
] of jumper J1. The
TLV841EVM provides jumper J3 and test point TP2 that is connected directly to the RESET pin for monitoring
and/or interfacing to other devices.
EVM Setup and Operation
12
TLV841EVM Voltage Supervisor User Guide
SNVU755A – JANUARY 2021 – REVISED JUNE 2021
Copyright © 2021 Texas Instruments Incorporated
