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A

B

C

D

D

C

B

A

ti

6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA

TITLE

SHEET

OF

FILE

SIZE

DATE

REV

28-Oct-2004

DRAWN BY

ENGINEER

REVISION HISTORY

REV

ENGINEERING CHANGE NUMBER

APPROVED

B

DATA ACQUISITION PRODUCTS

HIGH-PERFORMANCE ANALOG DIVISION

SEMICONDUCTOR GROUP

RICK DOWNS

BOB BENJAMIN

C:\Work\AIC33\Edge\TLV320AIC33EVM.ddb - Documents\Daughtercard Interface

B

2

2

TLV320AIC33EVM INTERFACE

DOCUMENT CONTROL NO.

6465236

GPIO0

2

DGND

4

GPIO1

6

GPIO2

8

DGND

10

GPIO3

12

GPIO4

14

SCL

16

DGND

18

SDA

20

CNTL

1

CLKX

3

CLKR

5

FSX

7

FSR

9

DX

11

DR

13

INT

15

TOUT

17

GPIO5

19

J16

DAUGHTER-SERIAL

1

2

JMP9

A0(+)

2

A1(+)

4

A2(+)

6

A3(+)

8

A4

10

A5

12

A6

14

A7

16

REF-

18

REF+

20

A0(-)

1

A1(-)

3

A2(-)

5

A3(-)

7

AGND

9

AGND

11

AGND

13

VCOM

15

AGND

17

AGND

19

J13

DAUGHTER-ANALOG

-VA

2

-5VA

4

AGND

6

VD1

8

+5VD

10

+VA

1

+5VA

3

DGND

5

+1.8VD

7

+3.3VD

9

J15

DAUGHTER-POWER

GPIO0

2

DGND

4

GPIO1

6

GPIO2

8

DGND

10

GPIO3

12

GPIO4

14

SCL

16

DGND

18

SDA

20

CNTL

1

CLKX

3

CLKR

5

FSX

7

FSR

9

DX

11

DR

13

INT

15

TOUT

17

GPIO5

19

J17

DAUGHTER-SERIAL

A0(+)

2

A1(+)

4

A2(+)

6

A3(+)

8

A4

10

A5

12

A6

14

A7

16

REF-

18

REF+

20

A0(-)

1

A1(-)

3

A2(-)

5

A3(-)

7

AGND

9

AGND

11

AGND

13

VCOM

15

AGND

17

AGND

19

J14

DAUGHTER-ANALOG

MCLK

BCLK

WCLK

DIN

DOUT

MISO

MOSI

SS

SCLK

RESET

GPIO1

GPIO2

SPI SELECT

SDA

SCL

TP40

AGND

TP41

DGND

J13A (TOP) = SAM_TSM-110-01-L-DV-P

J13B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K 

J16A (TOP) = SAM_TSM-110-01-L-DV-P

J16B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K 

J14A (TOP) = SAM_TSM-110-01-L-DV-P

J14B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K 

J17A (TOP) = SAM_TSM-110-01-L-DV-P
J17B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K 

J15A (TOP) = SAM_TSM-105-01-L-DV-P

J15B (BOTTOM) = SAM_SSW-105-22-F-D-VS-K 

MIC3L

MIC3R

HPLOUT

HPROUT

HPLCOM

HPRCOM

DRVDD

AVDD_DAC

AVDD_ADC

DVDD

IOVDD

MICBIAS

MICDET

LINE1LP

LINE1RP

LINE1LM

LINE1RM

MONO_LOP

MONO_LOM

LINE2LP

LINE2RP

LEFT_LOP

RIGHT_LOP

LINE2LM

LINE2RM

LEFT_LOM

RIGHT_LOM

+5VA

VIN

3

VOUT

2

GND

1

U2
REG1117-3.3

+5VA

C26

10uF

C17

0.1uF

C27

10uF

+3.3VA

VCC

8

VSS

4

SD

A

5

SCL

6

A0

1

A1

2

A2

3

WP

7

U3

24LC64I/SN

C34

0.1uF

IOVDD

R13

2.7K

1

2

JMP18

1

2

JMP19

RESET

Содержание TLV320AIC33EVM

Страница 1: ...18 SLVS209 SN74LVC125A SCAS290 SN74LVC1G125 SCES223 SN74LVC1G07 SCES296 Contents 1 EVM Overview 2 2 Analog Interface 3 3 Digital Interface 4 4 Power Supplies 5 5 EVM Operation 6 6 Kit Operation 7 7 EV...

Страница 2: ...ereo audio codec Modular design for use with a variety of digital signal processor DSP and microcontroller interface boards The TLV320AIC33EVM PDK is a complete evaluation kit which includes a univers...

Страница 3: ...IC1 or LINE1 Analog Input Right Plus or Multifunctional J13 9 AGND Analog Ground J13 10 MIC3L MIC3 Input Left or Multifunctional J13 11 AGND Analog Ground J13 12 MIC3R MIC3 Input Right or Multifunctio...

Страница 4: ...pins of the device Consult Samtec at www samtec com or call 1 800 SAMTEC 9 for a variety of mating connector options Table 3 summarizes the digital interface pinout for the TLV320AIC33EVM Table 3 Dig...

Страница 5: ...e routed to J16 I2 C is actually routed to both connectors however the device is connected only to J16 J15 provides connection to the common power bus for the TLV320AIC33EVM Power is supplied on the p...

Страница 6: ...n lower position looking at the board with text reading right side up If 1 8VD and 3 3VD are supplied externally disable the onboard regulators by placing SW1 switches in the OFF position Each power s...

Страница 7: ...to 4 SPI SS is provided from J16 2 JMP12 3 5 In I2C control mode this jumper sets the state of A1 When connecting 3 to 5 A1 0 when connecting 1 to 3 A1 1 In SPI control mode connecting 3 to 4 SPI SCL...

Страница 8: ...DEVM Interface board is intended to be used in USB mode where control of the installed EVM is accomplished using the onboard USB controller device Provision is made however for driving all the data bu...

Страница 9: ...W 2 positions 1 through 7 should be set to ON while SW 2 8 should be set to OFF Ensure that the TLV320AIC33EVM is installed on the USB MODEVM Interface board aligning J13 J14 J15 J16 J17 with the corr...

Страница 10: ...for modular EVMs or one double wide serial modular EVM may be installed Since the TLV320AIC33EVM is a double wide modular EVM it is installed with connections to both EVM positions which connects the...

Страница 11: ...tate of A0 and A1 Note that this address should correspond to the jumper settings selected as described in Table 5 Figure 4 I2 C Address Selection Window Figure 2 illustrates the indicators and contro...

Страница 12: ...e Figure 5 This feature provides the ability to generate signals to send to the TLV320AIC33 DACs as well as viewing and analyzing signals read by the TLV320AIC33 ADCs This ability to view and process...

Страница 13: ...www ti com Kit Operation Figure 5 Audio Generator Screen SBAU114 November 2005 TLV320AIC33EVM and TLV320AIC33EVM PDK User s Guide 13...

Страница 14: ...he ADCs Figure 6 Audio Analyzer Screen The analyzer screen features a graph of the input signals both left and right channels in a time domain display at the top of the screen and in the frequency dom...

Страница 15: ...onsole Each input channel has a vertical strip that corresponds to that channel LINE1L and LINE1R input strips have controls to route that input to either the left or right ADC input by default all in...

Страница 16: ...are the controls for the ADC PGA the master volume controls for the ADC inputs Each channel of the ADC can be powered up or down as needed using the Powered Up buttons PGA soft stepping for each chan...

Страница 17: ...enabled In the upper right corner of this tab is the Digital Mic Functionality control The TLV320AIC33 can accept a data stream from a digital microphone which would have its clock pin connected to th...

Страница 18: ...software or USB interface If an external audio bus is used audio not driven over the USB bus then settings may be changed to any valid combination See Figure 9 Figure 9 Clocks Tab The codec clock sour...

Страница 19: ...f the desired Fsref must be set using the switch on this tab it can be set to either 44 1kHz or 48kHz Once the desired Fsref and PLLCLK_IN values are correctly set pushing the Search for Ideal Setting...

Страница 20: ...upt output the behavior of the interrupt can be selected using the Interrupt Duration control A Single 2ms pulse can be delivered when the selected interrupt occurs or Continuous Pulses can be generat...

Страница 21: ...FP0 MFP1 and MP3 inputs are indicated by the three indicator lights on the right hand side of this groupbox The AGC tab see Figure 11 consists of two identical sets of controls one for the left channe...

Страница 22: ...ng the discussion in Section 6 9 See Figure 12 Figure 12 Filters Tab The right hand side of this tab shows a display that plots the magnitude and phase response of each biquad section plus the combine...

Страница 23: ...on a tab control in the lower left corner of the screen When a filter type is selected and suitable input parameters defined the response will be shown in the Effect Filter Response graph Regardless o...

Страница 24: ...e will be plotted on the Effect Filter Response graph 6 12 4 EQ Filters EQ or parametric filters can be designed on this tab see Figure 16 Enter a gain bandwidth and a center frequency Fc Either bandp...

Страница 25: ...r type to simulate Butterworth Chebyshev Inverse Chebyshev Elliptic or Bessel Parameter entry boxes appropriate to the filter type will be shown ripple for example with Chebyshev filters etc Enter the...

Страница 26: ...to provide preset filters common for certain types of program material This tab see Figure 18 allows selection of one of four preset filter responses Rock Jazz Classical or Pop Figure 18 Preset Filter...

Страница 27: ...nter the coefficients for the de emphasis filter response desired While on this tab the de emphasis response will be shown on the Effect Filter Response graph however note that this response is not in...

Страница 28: ...be entered directly on this tab see Figure 20 for both biquads for both left and right channels The filter response will not be shown on the Effect Filter Response graph for user filters Figure 20 Us...

Страница 29: ...ect properly make sure the appropriate coefficients are already loaded into the two biquad sections The User Filters tab may be used to load the coefficients See Figure 21 Figure 21 3D Effect Settings...

Страница 30: ...the output level Each channel s level can be set independently using the corresponding Volume knob Alternately by checking the Slave to Right box the left channel Volume can be made to track the righ...

Страница 31: ...lume is controlled by the knob at the far right of these panels The output can be muted or gain up to 9dB can be applied Power for the line output can also be controlled using the button below this ma...

Страница 32: ...See the datasheet for more details on this option The outputs can be set to soft step their volume changes using the Output Volume Soft Stepping control and set to step once per Fs period once per tw...

Страница 33: ...ings of controls one for each of the high power outputs Each output has a mixer to mix the LINE2L LINE2R PGA_L PGA_R DAC_L and DAC_R signals assuming that the DACs are not routed directly to the high...

Страница 34: ...simple scripting language controls the TAS1020 on the USB MODEVM from the LabView based PC software The main program controls described previously do nothing more than write a script which is then han...

Страница 35: ...cute Command Buffer button is pressed the script will run and the script along with resulting data read back during the script will be saved to the file specified The log file is a standard text file...

Страница 36: ...cket consists of the following bytes shown in Table 8 Table 8 Data Packet Configuration BYTE NUMBER TYPE DESCRIPTION 0 Interface Specifies serial interface and operation The two values are logically O...

Страница 37: ...g addr 2 0x02 3 0xE0 4 0xAA 5 0x55 In each case the TAS1020 will return in an HID interrupt packet the following 0 interface byte status status REQ_ERROR 0x80 INTF_ERROR 0x40 REQ_DONE 0x20 1 for I2C i...

Страница 38: ...ld come back as 0 0x51 interface INTF_ERROR 1 0xA0 2 0x02 3 0x05 4 0xAA 5 0x55 If the request is malformed that is the interface byte byte 0 takes on a value which is not described above the return pa...

Страница 39: ...ored 2 0x01 length ALWAYS a 1 3 0x00 this value is ignored 4 0x40 01000000 You may also read back from the GPIO to see the state of the pins Let s say we just wrote the previous example to the port pi...

Страница 40: ...ue is expressed in hexadecimal and each byte must be separated by a space Commands are interpreted and sent to the TAS1020 by the program using the protocol described in Section 6 16 1 The first byte...

Страница 41: ...Command File from the File menu Locate your script and open it The script will then be displayed in the command buffer You may also edit the script once it is in the buffer but saving of the command...

Страница 42: ...ip 24LC64 I SN J1 J4 J8 J10 Screw Terminal Block 2 On Shore Technology ED555 2DS Position J5 J11 J12 Screw Terminal Block 3 On Shore Technology ED555 3DS Position J6 J7 3 5mm Audio Jack T R S CUI Inc...

Страница 43: ...F 50V Ceramic TDK C1608C0G1H102J Chip Capacitor 5 NPO C15 0 1 F 16V Ceramic TDK C1608X7R1C104K Chip Capacitor 10 X7R C16 C17 0 33 F 16V Ceramic TDK C1608X5R1C334K Chip Capacitor 20 Y5V C9 C10 C11 C12...

Страница 44: ...DV P J131B J132B J21B J22B 20 pin SMT socket Samtec SSW 110 22 F D VS K J133A J23A 10 pin SMT plug Samtec TSM 105 01 L DV P J133B J23B 10 pin SMT socket Samtec SSW 105 22 F D VS K J6 4 pin double row...

Страница 45: ...www ti com Appendix A TLV320AIC33EVM Schematic Appendix A The schematic diagram is provided as a reference SBAU114 November 2005 TLV320AIC33EVM Schematic 45...

Страница 46: ...2 JMP6 SCL R10 100K RESET AVDD_DAC DRVDD 1 2 J8 MONO OUT PLUS MINUS 1 2 J1 LINE 1 LEFT IN 1 2 J2 LINE 1 RIGHT IN PLUS MINUS PLUS MINUS 1 2 J3 LINE 2 LEFT IN 1 2 J4 LINE 2 RIGHT IN PLUS MINUS PLUS MINU...

Страница 47: ...16 DGND 18 SDA 20 CNTL 1 CLKX 3 CLKR 5 FSX 7 FSR 9 DX 11 DR 13 INT 15 TOUT 17 GPIO5 19 J17 DAUGHTER SERIAL A0 2 A1 4 A2 6 A3 8 A4 10 A5 12 A6 14 A7 16 REF 18 REF 20 A0 1 A1 3 A2 5 A3 7 AGND 9 AGND 11...

Страница 48: ...www ti com Appendix B USB MODEVM Schematic Appendix B The schematic diagram is provided as a reference USB MODEVM Schematic 46 SBAU114 November 2005...

Страница 49: ...C11 1uF C12 1uF USB SLAVE CONN EXT PWR IN 6 00 MHZ 6463996 RED 1OE 1 1A 2 1Y 3 2OE 4 2A 5 2Y 6 GND 7 3Y 8 3A 9 3OE 10 4Y 11 4A 12 4OE 13 VCC 14 U3 SN74LVC125APW 1OE 1 1A 2 1Y 3 2OE 4 2A 5 2Y 6 GND 7...

Страница 50: ...4 SCL 16 DGND 18 SDA 20 CNTL 1 CLKX 3 CLKR 5 FSX 7 FSR 9 DX 11 DR 13 INT 15 TOUT 17 GPIO5 19 J22 DAUGHTER SERIAL 5VD 5VA A0 2 A1 4 A2 6 A3 8 A4 10 A5 12 A6 14 A7 16 REF 18 REF 20 A0 1 A1 3 A2 5 A3 7 A...

Страница 51: ...or proceeding User assumes all responsibility and liability for proper and safe handling and use of the EVM and the evaluation of the EVM TI shall have no liability for any costs losses or damages re...

Страница 52: ...ute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual pro...

Страница 53: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Texas Instruments TLV320AIC33EVM PDK TLV320AIC33EVM...

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