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12500 TI Boulevard. Dallas, Texas 75243

Title:

SHEET:

OF:

FILE:

SIZE:

DATE:

REV:

20 Jul-2005

Drawn By:

Engineer:

Revision History

REV

ECN Number

Approved

2xAIC12

DOCUMENTCONTROL #

GBL_SDA

GBL_DIN

FS_2

GBL_MCLK

GBL_SYNC_RESET*

DOUTb

R4
10K

3.3V_D

3.3V_A_DRV

3.3V_A_DRV

3.3V_A

3.3V_A

1.8V_D

1.8V_D

3.3V_D

3.3V_D

DGND

AGND

Master / Slave

Slave

W3

R5
10K

3.3V_D

FSD_1

FS_2

FSD_2

1.8V_D

DGND

DGND

W2

DGND

3.3V_D

FS_1

GBL_SYNC_RESET*

GBL_DIN

GBL_MCLK

GBL_SYNC_PWDN*

DOUTa

GBL_SCLK

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

J1

40-PIN SOCKET

GBL_SDA

GBL_SCL

DGND

DGND

DGND

DGND

C13
0.1uF

C1
1uF

C5
0.1uF

C29
0.01uF

C15
0.1uF

3.3V_D

DGND

C3
1uF

C7
0.1uF

C31
0.01uF

3.3V_D

DGND

C4
1uF

C8
0.1uF

C32
0.01uF

1.8V_D

DGND

C2
1uF

C6
0.1uF

C30
0.01uF

1.8V_D

DGND

3.3V_A

C14
0.1uF

C16
0.1uF

3.3V_A_DRV

GBL_SCL

GBL_SYNC_PWDN*

GBL_SCLK

3.3V_A

AGND

3.3V_A_DRV

MICIN_b

MICBIAS_b

INP1_b

INM1_b

INP2_b

INM2_b

OUTP1_b

OUTM1_b

DRV_AGND

AGND

DRV_AGND

W9

C9
0.1uF

C10
0.1uF

C11
0.1uF

C12
0.1uF

3.3V_A_DRV

3.3V_A_DRV

3.3V_A

3.3V_A

1.8V_D

1.8V_D

3.3V_D

3.3V_D

DGND

AGND

R1
10K

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

P1

40-PIN PLUG

DGND

DGND

DGND

R2
10K

3.3V_D

R3
10K

FSD_2

GBL_SYNC_RESET*

GBL_DIN

GBL_MCLK

GBL_SYNC_PWDN*

DOUTb

GBL_SCLK

GBL_SDA

GBL_SCL

DGND

AGND

W8

IOVSS

1

SCLK

28

IOVDD

2

AVDD

17

AVSS

16

DVDD

29

DVSS

30

SDA

27

SCL

26

MCLK

25

FS

4

FSD

3

DIN

6

DOUT

5

M/S

7

/PWRD

8

/RESET

24

INM1

22

INP1

23

INM2

20

INP2

19

BIAS

21

MICIN

18

DRVDD

11

DRVSS

12

OUTP1

10

OUTP2

13

OUTM1

9

OUTP3

15

OUTMV

14

U1

TLV320AIC12K / 14K

OUTP2_b

OUTMV_b

OUTP3_b

GBL_SDA

GBL_DIN

FS_1

GBL_MCLK

GBL_SYNC_RESET*

DOUTa

Slave

FSD_1

1.8V_D

DGND

3.3V_D

DGND

GBL_SCL

GBL_SYNC_PWDN*

GBL_SCLK

3.3V_A

AGND

3.3V_A_DRV

MICIN_a

MICBIAS_a

INP1_a

INM1_a

INP2_a

INM2_a

OUTP1_a

OUTM1_a

DRV_AGND

IOVSS

1

SCLK

28

IOVDD

2

AVDD

17

AVSS

16

DVDD

29

DVSS

30

SDA

27

SCL

26

MCLK

25

FS

4

FSD

3

DIN

6

DOUT

5

M/S

7

/PWRD

8

/RESET

24

INM1

22

INP1

23

INM2

20

INP2

19

BIAS

21

MICIN

18

DRVDD

11

DRVSS

12

OUTP1

10

OUTP2

13

OUTM1

9

OUTP3

15

OUTMV

14

U2

TLV320AIC12K/14K

OUTP2_a

OUTMV_a

OUTP3_a

W1

DGND

AIC12K/14KEVM

B

J.PURVIS

Y.DEWONCK

2

3

W10

DOUTa

DOUTb

6435620

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Содержание TLV320AIC12K Series

Страница 1: ...TLV320AIC12KEVM TLV320AIC14KEVM August 2005 Data Acquisition Products User s Guide SLAU097A ...

Страница 2: ...tute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of information in TI data books or data sheets is permissible only if reproduction is...

Страница 3: ... handling or use of the goods Please be aware that the products received may not be regulatory compliant or agency certified FCC UL CE etc Due to the open construction of the product it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR A...

Страница 4: ...rtainty as to the load specification please contact a TI field representative During normal operation some circuit components may have case temperatures greater than 30 C The EVM is designed to operate properly with certain components above 40 C as long as the input and output ranges are maintained These components include but are not limited to linear regulators switching transistors pass transis...

Страница 5: ...Bill of Materials Appendix A TLV320AIC12KEVM 14KEVM Schematic FCC Warning This equipment is intended for use in a laboratory test environment only It gen erates uses and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules which are designed to provide reasonable protection against radio frequen...

Страница 6: ...ents call the Texas Instruments Literature Response Center at 800 477 8924 or the Product Information Center PIC at 972 644 5580 When ordering identify this booklet by its title and literature number Updated documents can also be obtained through our website at www ti com Data Sheets Literature Number TLV320AIC12K SLWS115 TLV320AIC14K SLWS115 ...

Страница 7: ...2 1 Codec to Platform 2 2 2 2 Jumper Options 2 4 2 2 1 Stand Alone Slave 2 4 2 2 2 Single Master Only 2 5 2 2 3 Master Slave Cascade 2 5 3 Analog Interface 3 1 4 EVM Operation 4 1 5 TLV320AIC12KEVM 14KEVM Bill of Materials 5 1 6 TLV320AIC12KEVM 14KEVM Schematic A 1 ...

Страница 8: ...red Signals 4 2 Tables 2 1 Pinout for 40 Pin Connector 2 2 2 2 Jumper Options 2 4 2 3 Stand Alone Slave Jumper Settings 2 5 2 4 Single Master Only Jumper Settings 2 5 2 5 Master Slave Cascade Jumper Settings 2 5 3 1 Analog Interface Connectors 3 1 ...

Страница 9: ...IC12K TLV320AIC14K This guide refers to the TLV320AIC12K only since the remaining device feature set is a subset of the TLV320AIC12K Any important differences are noted Figure 1 1 EVM The EVM is split into two complementary halves as shown in Figure 1 1 Slave CODEC Master CODEC Chapter 1 ...

Страница 10: ...1 2 ...

Страница 11: ...he digital interface Create a custom interface between the codec EVM and the host system Alternatively if a TI DSK DSP starter kit is the host system a develop ment platform is available from TI This platform provides the additional functions that the codec requires in a convenient form factor Topic Page 2 1 Codec to Platform 2 2 2 2 Jumper Options 2 4 Chapter 2 ...

Страница 12: ...DIN Data in J1 6 DGND Digital ground J1 7 DOUT Data out J1 8 Reserved Reserved for future use J1 9 FS Frame sync J1 10 Reserved Reserved for future use J1 11 CLKX Transmit clock J1 12 Reserved Reserved for future use J1 13 FSX Frame sync transmit J1 14 Reserved Reserved for future use J1 15 DX Data transmit J1 16 DR Data receive J1 17 RESET Global reset for all devices J1 18 FSR Frame sync receive...

Страница 13: ... V J1 38 AGND Analog ground J1 39 3 3V_A Analog 3 3 V J1 40 AGND Analog ground The development platform supports a number of functions that the codecs require These are MCLK generation Manual reset generation Power options Refer to the DSP Codec Development Platform User s Guide SLAU090 for details regarding the development platform Further descriptions regarding the operation of this EVM assumes ...

Страница 14: ...ly or via capacitor W8 Connects analog and digital ground together W9 Gives user the option of disconnecting the 3 3 V driver ground from the regular analog ground W10 Use for odd number codec channels Isolate the data from the co dec not participating in the chain P1 9 P1 10 Last FSD in the chain must be high P1 11 P1 12 SCL must be high P1 13 P1 14 SDA must be high Since the EVM contains two cod...

Страница 15: ...Only Jumper Settings Jumper 1 2 2 3 W2 Inserted Not inserted W3 Inserted Not inserted W4 Inserted Not inserted P1 9 P1 10 N A N A P1 11 P1 12 Inserted Inserted P1 13 P1 14 Inserted Inserted 2 2 3 Master Slave Cascade This configuration applies to EVM1 only and is the factory set shipping condition When both codecs are used both U1 and U2 are active In this condition U2 is always the master codec a...

Страница 16: ...d loads to be connected to the codecs screw terminals have been used wherever possible Table 3 1 Analog Interface Connectors TLV320AIC12K TLV320AIC14K Master Slave Master Slave Input Sources Microphone input J9 J8 J9 J8 INP1 J5 J3 J5 J3 INP2 J4 J2 J4 J2 Output Loads OUTP1 OUTM1 600 Ω line output J7 J6 J7 J6 OUTP2 OUTP3 16 Ω driver output J11 J10 NA Chapter 3 ...

Страница 17: ...3 2 ...

Страница 18: ...utomatically based on the available MCLK It is now possible to calculate what should be observed after power up by calculating what FS and SCLK should be observed FS J In this example MCLK is generated by the development platform and is equal to 100 MHz J FS MCLK 16 m n p J Default values for m n and p are 16 6 and 8 respectively J FS 100 106 16 16 6 8 J FS 8138 Hz SCLK J SCLK 16 FS number of devi...

Страница 19: ...4 2 The captured signals are shown in Figure 4 1 Figure 4 1 EVM Captured Signals FS SCLK ...

Страница 20: ...4 1 µF C1 C2 C3 C4 Capacitor 1 µF 10 V ceramic Y5V 0603 Panasonic ECJ 1VF1A105Z 5 10 kΩ R1 R2 R3 R4 R5 Resistor 10 kΩ 1 16 W 5 0603 SMD Panasonic ERJ 3GEYJ103V 2 10 kΩ R6 R7 Resistor 10 0 kΩ 1 8 W 1 1206 SMD Panasonic ERJ 8ENF1002V 2 U1 U2 IC CODEC 1CH 16 bit 3 3 V 30 TSSOP Texas Instruments TLV320AIC12KIDBT Alternate IC CODEC 1CH 16 bit 3 3 V 30 TSSOP Texas Instruments TLV320AIC14KIDBT 1 TLV320AI...

Страница 21: ...Used Part number Vendor Description Ref Des Value 2 See Assy Dwg 0 500 4 40 Nylon hex thread SP Keystone Electronics 1902C 2 See Assy Dwg 4 40 X 1 4 Machine screw PH SS Building Fasteners PMSSS 440 0025 PH ...

Страница 22: ...A 1 TLV320AIC12K 14K EVM Schematic TLV320AIC12K 14K EVM Schematic The TLV320AIC12K 14K EVM schematics are provided on the following pages Appendix A ...

Страница 23: ...B A 12500 TI Boulevard Dallas Texas 75243 Title SHEET OF FILE SIZE DATE REV 20 Jul 2005 Drawn By Engineer Revision History REV ECN Number Approved AIC12_REVA DOCUMENTCONTROL 2xAIC12 Analog_IO AIC12K 14KEVM B J PURVIS Y DEWONCK 1 3 6435620 ...

Страница 24: ...uF C10 0 1uF C11 0 1uF C12 0 1uF 3 3V_A_DRV 3 3V_A_DRV 3 3V_A 3 3V_A 1 8V_D 1 8V_D 3 3V_D 3 3V_D DGND AGND R1 10K 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 P1 40 PIN PLUG DGND DGND DGND R2 10K 3 3V_D R3 10K FSD_2 GBL_SYNC_RESET GBL_DIN GBL_MCLK GBL_SYNC_PWDN DOUTb GBL_SCLK GBL_SDA GBL_SCL DGND AGND W8 IOVSS 1 SCLK 28 IOVDD 2 AVDD...

Страница 25: ...NP1_a OUTP1_a OUTM1_a MICIN_a INM1_a INM2_a INP2_a 3 B A 2 1 J9 AGND C28 0 1uF C22 0 1uF C24 0 1uF C21 0 1uF C23 0 1uF R7 10K W5 C27 0 1uF W7 1 2 3 J11 OUTP2_a OUTMV_a OUTP3_a MICBIAS_b 1 2 J3 1 2 J6 1 2 J2 INP1_b OUTP1_b OUTM1_b MICIN_b INM1_b INM2_b INP2_b 3 B A 2 1 J8 AGND C26 0 1uF C20 0 1uF C18 0 1uF C17 0 1uF C19 0 1uF R6 10K W4 C25 0 1uF W6 1 2 3 J10 OUTP2_b OUTMV_b OUTP3_b AIC12K 14KEVM B ...

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