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2 EVM Setup and Features
Use the following equipment to evaluate the performance of the TLIN1431-Q1:
• Power supply capable of supplying the desired supply voltage. Typical LIN applications use 12 V or 24 V, but
the TLIN1431-Q1 can operate with any supply voltage from 5.5 V to 28 V. Connect this voltage across the
VBAT and GND pins of the J11 paired banana jack connector.
• If the LIN bus interface is to be observed using an oscilloscope, use probes capable of tolerating voltages as
large as VBAT.
• The logic interface pins may interface to a microcontroller, pattern generator, or logic analyzer with logic
levels matching the LDO VCC voltage, or a high-level voltage consistent with the V
IH
requirements of the
device.
• The LDO output can be used for testing load and thermal capabilities with a source meter or physical
resistance connected between the jumper pins on J4 (pins 1 and 2) or any other VCC output pin or test point.
• An external device to be controlled via the channel expansion functionality (accessed from J6 and J7) can be
connected using jumper cables or wires as appropriate.
2.1 Startup Mode Configurations
2.1.1 Pin and SPI Modes
Two modes of operation are available on the TLIN1431-Q1: pin mode and SPI mode. The mode of the device is
determined by the state of pin 7 (PIN/nCS) upon power-up. If pin 7 is pulled low or connected to GND at startup,
the device operates in pin mode, with no SPI interface. If pin 7 is left floating or pulled high at startup, then the
device operates in SPI mode, where the SPI interface is enabled and the user can access the internal registers
of the device.
Additionally, the TLIN14315-Q1 is capable of VIO less operation as determined by the biasing of this PIN/nCS
pin. If it is left floating, the device operates using 3.3 V SPI communication. If it is pulled high to 5 V, then it
operates using 5 V SPI communication.
10k
500k
GND
PIN/nCS
PIN Mode 3.3 V SPI 5 V SPI
3.3 V
PIN/nCS
3.3 V
PIN/nCS
3.3 V
V
CC
(5 V)
Figure 2-1. PIN/nCS Configuration
Note the TLIN14313-Q1, which includes a 3.3 V LDO, does not include VIOless operation and is only capable of
3.3 V SPI communication.
J5 allows for easy biasing of the PIN/nCS pin to either a pull-down resistor for pin mode or floating/pull-up for
VIOless SPI mode operation.
The TLIN1431-Q1 device has alternate pin designations and functions depending on the power-up mode
chosen. The designations are shown in
Table 2-1 , and the functions of each pin are described in the TLIN1431-
Q1 data sheet.
EVM Setup and Features www.ti.com
4 TLIN1431EVM User's Guide SLLU326 – MAY 2022
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