Texas Instruments TL16C750EEVM, Руководство пользователя

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Loopback mode
7 SLLU317 – January 2020
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TL16C750EEVM User's Guide
When the EVM is used in the 3.3 V and lower set up, the processor interface headers used should be the
ones located towards the center of the PCB. J3 provides access to output pins INT, TXRDY, and RXRDY.
J12 allow access to the bidirectional data pins D0-D7. J14 are for the input pins RESET, A0, A1, A2, CS,
IOW, and IOR. J18 provides access to the inputs RI, CD, DSR, CTS, and RX. Finally J13 allows access to
DTR, RTS, OP, and TX. The
Figure 6 highlights all the jumper locations for connecting the processor pins.
Figure 6. 3.3 V only control image
6 Loopback mode
While TL16C750E does include an option to perform a loopback test through software, a hardware
loopback test can be performed by shunting J21 like the
Figure 7 .