Texas Instruments TIDA-050026-23881, Руководство по конструкции, Страница: 4 / 24

System Overview
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4 SLVUBN3A – May 2019 – Revised October 2019
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24-Port (4 Pair) Power Sourcing Equipment Reference Design for Multi-port
Applications
2.2.1.3 3.3 V_ISO
The reference design kit provides galvanic isolation between PoE power side and host side using digital
isolators. The host side power is provided by 3.3 V_ISO.
2.2.2 Communication Interface
2.2.2.1 PSE I2C Communication
The motherboard provides two I2C interfaces communicating to PSE:
1. J10 on the motherboard (PSEMTHR24EVM-081) provides I2C access to all PSE devices directly. The
TPS2388x GUI can communicate to PSE devices with the USB2ANY interface adapter.
2. J11 and J12 on the motherboard (PSEMTHR24EVM-081) provides I2C access and system control
signal to the MSP430 daughtercard.
2.2.2.2 MCU - Host Communication
The MSP430 daughtercard provides I2C/UART communication port to host through J12 to J14 on
MSP430 daughtercard (PSEMCUDAUEVM-082). The PSE system GUI provides host configurations to the
PSE system.
Host interface protocol user's guide can be accessed from the TIDA-050026-23881 folder or the
PSEMCUDAUEVM-082 tool folder .
2.2.3 MSP430F523x Hardware Design
Table 2. MSP430 GPIO Pin Assignment
PIN NUMBER
MSP430F5234 (48RGZ)
TERMINAL FUNCTION COMMENT
COMMUNICATION
22 P3.0 I2C SDA USCI_B0 I2C to PSEs
23 P3.1 I2C SCL USCI_B0 I2C to PSEs
30 P4.1 I2C SDA USCI_B1 I2C to host
31 P4.2 I2C SCL USCI_B1 I2C to host
33 P4.4 UART TX USCI_A1 UART to host (debug only)
34 P4.5 UART RX USCI_A1 UART to host (debug only)
21 P2.7 SPI CLK USCI_A0 SPI to host (reserved)
24 P3.2 SPI slave TX enable, USCI_A0 SPI to host (reserved)
25 P3.3 UART TX,USCI_A0 or SPI
slave in, master out UART to host TX or SPI to host (reserved)
26 P3.4 UART RX, USCI_A0 or SPI
slave out, master in UART to host RX or SPI to host (reserved)
HARDWARE INTERRUPT
13 P1.0 PSE INT Connect to PSE INT pin
16 P1.3 OC Alert Connect to external current sensing circuit if not
used, connect to 3.3 V
18 P1.5 Power supply 1 Connect to power supply 1 power good signal. In
RPS mode, P1.5 must be connected to main power
supply.
If there is only one power supply, the
power good signal must be connected to P1.5.
19 P1.6 Power supply 2 Connect to power supply 2 power good signal, if not
used, connect to GND. In RPS mode, P1.6 must be
connected to backup power supply
20 P1.7 Disable all ports This is for hardware disable ports (reserved)
GENERAL I/O
4 P5.0 RESET PSE RESET Connect to PSE RESET pin