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01-MAIN-Sheet.SchDoc
Sheet Title:
Size:
Mod. Date:
File:
Sheet:
of
C
http://www.ti.com
Contact:
http://www.ti.com/support
TIDA-010132
Project Title:
Designed for:
Public Release
Assembly Variant:
001
© Texas Instruments
2018
Drawn By:
Engineer:
Avinash N
Sankar Sadasivam
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application.
Not in version control
SVN Rev:
TIDA-010132
Number:
Rev:
E1
TID #:
010132
Orderable:
NA
FMC_JTAG
F
M
C
_
L
M
K
AFE1_FMC_SPI
AFE2_FMC_SPI
AFE1_MISC
AFE1_SERDES
AFE2_SERDES
AFE2_MISC
I2
C
_
SD
A
I2
C
_
SC
L
F
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FMC INTERFACE SHEET
FMC INTERFACE SHEET.SchDoc
A
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AFE1_SERDES
AFE1_MISC
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A
F
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1
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IV
_I
N
AFE1_DCLK
AFE2_DCO
AFE1_DCO
AFE1
AFE1.SchDoc
A
F
E
1
_D
IV
_I
N
A
F
E
2
_D
IV
_I
N
F
M
C
_
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K
SDA
SCL
LMK_SCK
LMK_CS
LMK_SDIO
LMK_SDO
POWER_CLKN
POWER_CLKP
L
M
K
_A
FE
1
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L
K
M
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FE
1
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Y
SR
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FM
L
M
K
_A
FE
1
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Y
SR
E
FP
CLOCK MAIN
CLOCK MAIN SHEET.SchDoc
DACOUT
POWER_CLKN
POWER_CLKP
SDA
SCL
POWER TREE.
POWER TREE.SchDoc
F
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C
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L
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USB INTERFACE
USB INTERFACE SHEET.SchDoc
A
F
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2
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D
I_G
P
IO
FMC_JTAG
A
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2
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D
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IO
D
A
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O
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AFE2_FMC_SPI
L
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2_
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O
FTDI_TDI
AFE2_MISC
AFE2_SERDES
FMC_TDI
L
M
K
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FE
2
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L
K
M
L
M
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2
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AFE2_DCLK
AFE2_DCO
AFE1_DCO
AFE2
AFE2.SchDoc
FMC_JTAG
FMC_JTAG
F
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C
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L
M
K
A
F
E
2
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D
I_S
P
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A
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IO
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IO
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AFE1_FMC_SPI
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L
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1_
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L
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IO
L
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AFE2_FMC_SPI
FMC_Dout
FMC_Dout
FTDI_Dout
FTDI_Dout
DACOUT
D
A
C
O
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T
L
M
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2_
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IO
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O
L
M
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IO
LMK_SDIO
SCL
SDA
LMK_SCK
LMK_CS
LMK_SDO
AFE1_SERDES
AFE1_MISC
AFE2_SERDES
AFE2_MISC
S
E
L
_L
M
X
2_
C
S
S
E
L
_L
M
X
1_
C
S
J4
AFE_DCLK
AFE1_DCLK
AFE2_DCLK
AFE2_DCLK
U80
EP2C+
AFE1_DCO
AFE2_DCO
AFE2_DCO
AFE1_DCO
SCL
SDA