Texas Instruments TIDA-010046, Руководство по конструкции

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PSE Side Board
PD Side Board
(DUT)
Capacitive
Clamp
EFT Generator
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Hardware, Software, Testing Requirements, and Test Results
39 TIDUES1A – October 2019 – Revised February 2020
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EMC Compliant 10/100-Mbps Ethernet PHY Reference Design With IEEE
802.3at Type-1 ( ≤ 12.95 W) PoE-PD
3.2.2.3.2.2 IEC-61000-4-4 EFT Test
Figure 38 shows the EFT test setup. During the EFT test, both the PSE side and PD side boards were
used, connected using a 3-m long CAT5e Ethernet cable pass through a capacitive clamp as Figure 38
shows. The EFT burst signals were injected on the Ethernet cable as a common-mode noise. Both the
boards were powered by two separate 12-V batteries. During the test, one board was generating the
pseudo-random packets and the other board was simply looping back those packets. After the test, the
DUT was verified for functionality. The test results show the DUT can withstand up to ±2 kV. The DUT
performed normally after each test. Because functionality could not be verified during the test, the result is
noted as passing criteria B.
Table 16 shows the test results. Packet errors were observed during the
application of the EFT bursts but that recovers aa soon as the EFT pulses are removed. No link drop was
observed.
Figure 38. IEC61000-4-4 EFT Test Setup for TIDA-010046
Table 16. EFT Test Summary
IMMUNITY
TEST
STANDARD PORT TEST CONDITION CRITERIA |
RESULT
EFT IEC 61000-4-4 Level 4: ±2 kV with capacitive
clamp and 5 kHz Communication cable PSE side board generated PRBS and
PD side board (DUT) loops back the
packets B | Pass (Link does not
drop)
EFT IEC 61000-4-4 Level 4: ±2 kV with capacitive
clamp and 5 kHz Communication cable PD side board (DUT) generated PRBS
and PSE side board loops back the
packets B | Pass (Link doesn't
drop)