background image

2.5

ADC Interface

2.6

Board Power up General Guidelines

3

Jumpers and Control Utilities

3.1

Clock Frequency Change Jumper

3.2

SPDIF/PSIA Utilization Jumpers

3.3

Data Routing Jumpers

www.ti.com

Jumpers and Control Utilities

In the absence of digital signal source ADC (PCM1808) may be used to convert an analog audio signal to
digital signal and provide it to TAS5704. DIR9001 still provides clocks to ADC in this process. The
frequency of the oscillator selected for DIR 9001determinse the sampling frequency in the absence of
digital signal. If the OSC is 24MHz the sampling frequency will be set at 96kHz and if the OSC is selected
to be 12MHz the sampling frequency will be defaulted to 48kHz when there is no signal on SPDIF input
terminals. ADC is an additional feature to this board to provide flexibility in sourcing audio signal to
TAS5704. Please review the datasheet of PCM1808 for detail description of the ADC on this EVM.

After connecting the loud speakers (loads), power supply, and data line, power up the VIN power supply.
Then power up the PVCC power supply. It is recommended to set the PVCC level to 10 volts and then
ramp it up to 20 volts to verify the cable connection functionality. It is recommended to set the gain to
–3dB at start by having both GAIN (

GAIN0

and

GAIN1

) jumpers inserted. Note that the gain settings

marked on the EVM are not correct. Please see

Table 3

on the next page for the correct settings. Having

jumpers

FM0

and

FM1

inserted and FM2 removed sets the data format for the device to I2S format. Make

sure the SPDIF format jumpers,

FMT0

and

FMT1

are removed to set the receiver format to I2S. It is

important to note that a device RESET (S2 on the top of the board labeled

MASTER RESET

) needs to be

applied after each gain, format, or configuration change in order for the device to latch in the new settings.
Finally, install jumpers CFG1 and

CFG2

in the Config Control to select

2-CH-BTL-AD

mode.

JP1: In the presence of a valid digital signal input, when SPDIF lock occurs, the user may use JP1 to
change LR clock and BIT clock. When a shunt is inserted, the SCKO = 512Fs and when the shunt is
removed the SCKO = 256Fs. Default is SCKO = 256Fs.

In the absence of a valid digital signal DIR9001 clock outputs switch to the frequency of crystal (Y1). If the
crystal is chosen to be 24MHz the LR clock will be 96KHz and if the crystal is chosen to be 12MHz the LR
clock will be 48kHz.

The jumpers MCLK, LRCK, SCLK, SDATA allow the user to switch between the internal clock and data
sources and external clock and data sources for instance PSIA (from AP instrument). The default
configuration of these jumpers is SPDIF as it is marked on the EVM with a white arrow. PSIA outputs may
be utilized using pins 2 and 3 of the jumpers. Keep in mind that pin 3 of each jumper is connected to
GND. Thus, the user must pay attention to the polarity of the PSIA output cables at the time of insertion.

Jumpers SDIN1, SDIN2: These jumpers enable the user to assign a data source to TAS5704 SDIN1 and
SDIN2 pins. See

Table 2

.

Table 2. TAS5704 SDINx Data Source

Jumper JP15:SDIN1

Jumper JP16:SDIN2

SDIN1 Source

SDIN2 Source

Position

Position

1-2

1-2

ADC

ADC

1-2

2-3

SPDIF/PSIA

SPDIF/PSIA

2-3

1-2

SPDIF/PSIA

ADC

2-3

2-3

SPDIF/PSIA

SPDIF/PSIA

SLOU224 – April 2008

TA5704EVM 4-Channel Digital Audio Power Amplifier with Hardware Control

11

Submit Documentation Feedback

Содержание TA5704EVM

Страница 1: ...TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control User s Guide Literature Number SLOU224 April 2008...

Страница 2: ...2 SLOU224 April 2008 Submit Documentation Feedback...

Страница 3: ...Jumpers and Control Utilities 11 3 1 Clock Frequency Change Jumper 11 3 2 SPDIF PSIA Utilization Jumpers 11 3 3 Data Routing Jumpers 11 3 4 GAIN Jumpers 12 3 5 Data Format Jumpers 12 3 6 CONFIG Jumper...

Страница 4: ...View of TAS5704EVM 9 5 Top Layer Composite 14 6 Top Layer 15 7 Bottom Layer 16 List of Tables 1 Recommended Power Supplies 10 2 TAS5704 SDINx Data Source 11 3 TAS5704 Gain Configuration 12 4 TAS5704 D...

Страница 5: ...otentially damage your software or equipment WARNING This is an example of a warning statement A warning statement describes a situation that could potentially cause harm to you The information in a c...

Страница 6: ...Documentation General Application Notes EVM Warnings Restrictions and FCC Warning See the Evaluation Board Kit Warnings and Restrictions page towards the end of this User s Guide 6 Read This First SL...

Страница 7: ...two 8 loudspeakers up to 20W per channel 10 THD N in a BTL configuration The TAS5704EVM can also be configured to drive four 4 speakers in a single ended SE configuration Finally the TAS5704EVM can be...

Страница 8: ...el SE Configuration Self contained protection systems and control pins Standard I2 S data input using optical or RCA inputs Analog input through analog to digital converter Subwoofer connection PWM te...

Страница 9: ...ards to power supply PSU and system interfaces The TAS5704EVM module is powered using two power supply sources a 10 26V PVCC power supply and a 5V VIN power supply The 3 3V voltage levels are generate...

Страница 10: ...ng metal binding post marked OUTC and OUTD on TAS5704EVM board Install jumpers JP3 JP6 and JP7 JP10 for BTL configuration The subwoofer is an option on this EVM which is provided through connecting TA...

Страница 11: ...1 are removed to set the receiver format to I2S It is important to note that a device RESET S2 on the top of the board labeled MASTER RESET needs to be applied after each gain format or configuration...

Страница 12: ...data format Both TAS5704 and DIR9001 are set by default to operate at 24 bit I2S format It is important to assert RESET after each format change in order for the device to recognize the format change...

Страница 13: ...ross OUTA Center OUTB Center and OUTC Center OUTD Center OUTB and OUTD are inverted 1 1 internally connect side of speaker to center terminal GND so that OUTB and OUTD will be in phase with OUTA and O...

Страница 14: ...TAS5704EVM Board Layout Top Composite View Board Layout Bill of Material and Schematics www ti com Figure 5 Top Layer Composite TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control...

Страница 15: ...Layout Top Layer View www ti com Board Layout Bill of Material and Schematics Figure 6 Top Layer SLOU224 April 2008 TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control 15 Submit Do...

Страница 16: ...out Bottom Layer View Board Layout Bill of Material and Schematics www ti com Figure 7 Bottom Layer TA5704EVM 4 Channel Digital Audio Power Amplifier with Hardware Control 16 SLOU224 April 2008 Submit...

Страница 17: ...CAP 4700pF 50V CERM 0603 X7R C42 C43 C61 3 Panasonic ECJ 1VB1H472K Digi Key PCC1780TR PCC1780CT CAP 0 01 F 16V CERM 0603 X7R C78 C91 2 Murata Electronics GRM188R71C103KA01D Digi Key 490 1525 2 490 152...

Страница 18: ...LHFT Digi Key 311 10KGTR 311 10KGCT R36 R50 R53 R69 RES 18 2k 1 10W 1 SMD 0603 R17 1 Yageo 9C06031A1822FKHFT Digi Key 311 18 2KHTR 311 18 2KHCT RES 249k 1 16W 1 SMD 0603 R61 1 Panasonic ERJ 3EKF2493V...

Страница 19: ...between the board and the wire BINDING POSTS Binding post 15A uninsulated OUTA OUTB 6 Johnson 111 2223 001 Digi Key J587 No ALT Part No OUTC OUTD Components GND GND Binding post Red 15A ECONO PVCC VI...

Страница 20: ...DECOUPLING JP1 IN SCKO 512 Fs JP1 OUT SCKO 256 Fs DECOUPLING 16Bit MSB RJ 24Bit MSB RJ 24Bit MSB LJ 24Bit MSB I2S SHUNTS IN 0 DATA FORMAT FMT0 SPDIF FORMAT 6 NC Tue Jul 10 2007 TO ADC LRCLK SCLK TO M...

Страница 21: ...I Print Date PROJECT NC NC 2 LDN SPDIF RYAN KEHR JULY 10 2007 Tue Jul 10 2007 FROM NC 6 5V DECOUPLING JP15 NOTE 1 2 SDIN2 ADC DEFAULT 2 3 SDIN2 SPDIF PSIA JP16 NOTE TO TAS5704 PCM1808PW ADC TAS5704EVM...

Страница 22: ...FORMAT FORMAT CONTROL GAIN0 CHANNEL GAIN dB GAIN CONTROL OUTPUT MODE DEFAULT JUMPERED TO 4xSE MODE SE DEFAULT MUTE POWER MUTE VALID PGND NC 6 Tue Jul 10 2007 TO SUBWOOFER CONNECTOR BLT SHUNTS IN SE S...

Страница 23: ...TO TO ADC 3 3V 1A TO ADC RYAN KEHR NC JULY 10 2007 NC 4 LDN TO SPDIF TAS5704 PGND TAS5601EVM2 DAUGHTERCARD LOW VOLTAGE POWER INPUTS PVCC 10 26V SNUBBERS EMI TO TAS5704 TO TAS5704 NC 6 Tue Jul 10 2007...

Страница 24: ...Filename Mod PCB Rev Sheet Save Date CX Schematic Rev Design Team Drawn By TI Print Date PROJECT NC 10JUL2007 RYAN KEHR NC JULY 10 2007 NC 5 LDN DATE PRE RELEASE RK NC 6 Tue Jul 10 2007 DESCRIPTION R...

Страница 25: ...ense not a transfer of title and is subject to the following restrictions You may not DISCLAIMER TI c remove any copyright or other proprietary notices from the Materials a modify the Materials includ...

Страница 26: ...e contains important safety information about temperatures and voltages For additional information on TI s environmental and or safety programs please contact the TI application engineer or visit www...

Страница 27: ...siness practice TI is not responsible or liable for any such statements TI products are not authorized for use in safety critical applications such as life support where a failure of the TI product wo...

Отзывы: