Texas Instruments SWRU197E, Руководство пользователя

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6.2.3 Minimum connection for SmartRF Packet Sniffer
In order to use the packet sniffer capabilities of the CC Debugger, it is also necessary to connect the
SPI bus to the SoC. The SPI interface is used by the CC Debugger for reading the captured RF
packets from the SoC.
2 1
4 3
6 5
8 7
10 9
GND
DC (Debug Clock)
RESETn
3.3V from debugger. Can
optionally be used to
power the target board
DD (Debug Data)
SoC
P2.2
P2.1
RESETn
Vdd
GND
Vdd
CC Debugger
Connector
CCxxxx
System-on-Chip
2.7 k
Ω
1
n
F
CSn
SCLK
MOSI
MISO
P1.7
P1.6
P1.5
P1.4
Note that the packet sniffer will overwrite the flash of the SoC with special packet capture firmware.
Note concerning the SPI interface to the SoC
All of the current TI RF SoCs can be configured to operate as SPI slaves, with the SPI signals (CS,
SCLK, MISO and MOSI) going to one of the USART peripherals. The packet sniffer application will
program the SoC with firmware that configures one of the USART peripherals in order to communicate
with the CC Debugger. The firmware can use any of the four possible pin configurations (USART 0 or
1, pin out alternative 1 or 2). However, only a subset is currently supported:
USART0, alt 1 USART0, alt 2 USART1, alt 1 USART1, alt 2
CC243x - - - supported
CC253x/CC254x - - - supported
CC111x supported - - supported
CC251x supported - - supported
Table 1 - Supported SPI connections (marked OK)
USART0, alt 1 USART1, alt 2
SCLK P0.5 P1.5
CS P0.4 P1.4
MOSI P0.3 P1.6
MISO P0.2 P1.7
Table 2 - USART pin out details
In case of multiple supported interfaces, the Packet Sniffer application will let you choose which
interface to use.