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Hardware Description
August 29, 2012
11
Headers and BoosterPacks
The two double rows of stackable headers are mapped to most of the GPIO pins of the
LM4F120H5QR microcontroller. These rows are labeled as connectors J1, J2, J3, and J4.
Connectors J3 and J4 are located 0.1 inches inside of the J1 and J2 connectors. All 40 header
pins of the J1, J2, J3, and J4 connectors make up the Stellaris® LM4F120 LaunchPad
BoosterPack XL Interface. Table 2-3, Table 2-4, Table 2-5, and Table 2-6 show how these header
pins are connected to the microcontroller pins and which GPIO functions can be selected.
NOTE:
To configure the device peripherals easily and intuitively using a graphical user interface
(GUI), see the Stellaris® LM4F Pinmux Utility found at
www.ti.com/tool/lm4f_pinmux
. This
easy-to-use interface makes setting up alternate functions for GPIOs simple and error-free.
PF1
GPIO
RGB LED (red)
PF2
GPIO
RGB LED (blue)
PF3
GPIO
RGB LED (green)
Table 2-3. J1 Connector
J1 Pin
GPIO
Stellaris Pin
GPIOPCTL Register Setting
GPIOAMSEL
1
2
3
7
8
9
14
1.01
3.3 V
1.02
PB5
57
AIN11
-
SSI2Fss
-
T1CCP1
CAN0Tx
-
-
1.03
PB0
45
-
U1Rx
-
-
T2CCP0
-
-
-
1.04
PB1
46
-
U1Tx
-
-
T2CCP1
-
-
-
1.05
PE4
59
AIN9
U5Rx
-
I2C2SCL
-
CAN0Rx
-
-
1.06
PE5
60
AIN8
U5Tx
-
I2C2SDA
-
CAN0Tx
-
-
1.07
PB4
58
AIN10
-
SSI2Clk
-
T1CCP0
CAN0Rx
-
-
1.08
PA5
22
-
-
SSI0Tx
-
-
-
-
-
1.09
PA6
23
-
-
-
I2C1SCL
-
-
-
-
1.10
PA7
24
-
-
-
I2C1SDA
-
-
-
-
Table 2-4. J2 Connector
J2 Pin
GPIO
Stellaris Pin
GPIOPCTL Register Setting
GPIOAMSEL
1
2
3
7
8
9
14
2.01
GND
2.02
PB2
47
-
-
-
I2C0SCL
T3CCP0
-
-
-
2.03
PE0
9
AIN3
U7Rx
-
-
-
-
-
-
2.04
PF0
28
-
U1RTS
SSI1Rx
CAN0Rx
T0CCP0
NMI
C0o
-
2.05
RESET
2.06
a
PB7
4
-
-
SSI2Tx
-
T0CCP1
-
-
-
2.07
b
PB6
1
-
-
SSI2Rx
-
T0CCP0
-
-
-
Table 2-2. User Switches and RGB LED Signals (Continued)
GPIO Pin
Pin Function
Feature