Texas Instruments SN65LVDS386EVM, Руководство пользователя

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SN65LVDS386 16-Channel LVDS Line Receiver
2-5
The Evaluation Boards
2.2 SN65LVDS386 16-Channel LVDS Line Receiver
The SN65LVDS386EVM accepts 16 LVDS inputs and generates 16 LVTTL
outputs (refer to the schematic in Appendix I). Connectors P3 through P7
(right-side edge) accept the differential LVDS inputs and connector P1/P2 pro-
vides the LVTTL output signals. The
as shipped configuration of the
SN65LVDS386 EVM also contains external resistors required for basic opera-
tion and testing of the device. Resistors R1 through R16 are 100-
Ω
resistors
which terminate each LVDS input channel. These are installed on the under-
side of the SN65LVDS386EVM, very close to the input pins of the device.
The LVTTL output-channels path (etch on the PWB) contains two pads where
external resistors may be installed. Resistors R17 through R32 are series re-
sistors where zero-ohm resistors are normally installed. These are followed by
resistors R33 through R48, which allow a pull-down resistor to be installed af-
ter the series resistor (R17 through R32). As shipped, these pull-down resis-
tors are not installed. The combination of these series (R17 through R32) and
pull-down resistors (R 33 through R48) allow the user to install a divider net-
work if desired. This might be necessary if the outputs are to be measured with
an instrument having a 50-
Ω
input impedance. By installing a 475-
Ω
series re-
sistor and a 50-
Ω
pull down resistor, a 20:1 divider is created (the 50-
Ω
pull-
down in parallel with the 50-
Ω
input impedance equals 25
Ω
, plus the 475-
Ω
series impedance of the instrument, for a total load of 500
Ω
on the output of
the receiver). As shipped, there is no resistor divider installed, and each device
LVTTL output is routed directly to the P1/P2 connectors through a 0-
Ω
resistor
(R17 through R32).
The remaining components are connectors for V
CC
and GND connections,
and decoupling capacitors for the LVDS device (these components are the
same for both EVM configurations).
There are also four jumpers (JMP1 through JMP4 ) located next to the P1/P2
connector row. These jumpers control the enable/disable for each four-chan-
nel (quad) section of the device. Each of these jumpers consist of three pins
and a jumper short. The center pin is connected to the device and the outer
pins (top and bottom) are V
CC
and GND. The jumper short can be moved so
contact is made between V
CC
and the enable/disable pin, or between GND
and the enable/disable pin. As shipped, the jumper shorts are installed to V
CC
so that all four sections of the device are enabled.