PCB Fabrication Notes and Stackup
4-2
4.1
PCB Fabrication Notes and Stackup
0.008”
0.008”
0.040”
Signal: Layer 1
GND: Layer 2
Split Power: Layer 3
GND: Layer 4
Stackup
Notes:
1) All fabrication items must meet or exceed best
industry practice. IPC–A 600C (Commercial Std.)
2) Laminate material NELCO N4000–13 [DO NOT
USE–13SI]
3) Copper weight: 1 oz start internal and 1/2 oz start
external
4) Finished board thickness: 0.62”
±
0.10”
5) Maximum warp and twist to be 0.005 inch per inch
6) Minimim copper wall thickness of plate-through holes
0.002 inch
7) Minimum annular ring of plate-through holes to be
0.001 inch
8) Minimum allowable line reduction to be 20% or 0.002
inch whichever is greater
9) 0.0125 inch signal lines on layer 1 to be impednace
controlled 100
W
to each other
±
10%
10)Dielectric constants are core 3.9
11) Fill vias that are in a pad are prepreg 3.9
4.2
Bill of Materials for SN65LVCP22/23 EVM
Comment
Quantity
Components
10
µ
F, 35V, 10%
2
C1, C6
68
µ
F, 10 V, 20%, Low ESR
2
C2, C7
1
µ
F, 25 V +80% –20%
2
C3, C8
0.1
µ
F, 50 V, 5%
2
C4, C9
0.001
µ
F, 25 V, 5%
2
C5, C10
0.01
µ
F, 50 V,
±
10%
2
C11, C17
SN65LVCP22D
1
DUT1
SN65LVCP23D
1
DUT2
3POS_JUMPER
8
JMP1, JMP2, JMP3, JMP4, JMP5, JMP6, JM7, JMP8
SMA_PCB_MT_MOD
16
J1, J2, J3, J4, J5, J6, J7, J8, J9, J10, J11, J12, J13, J14,
J15, J16
Banana Jack
3
J17, J18, J19
100
Ω
, 1/4 Watt, 1%
4
R1, R2,R10,R19
49.9
Ω
, 1/4 Watt, 1% (uninstalled)
12
R3, R4, R5, R6, R7, R8, R11, R12, R13, R14, R15, R16
