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User’s Guide
SWRU321A
– May 2013
Page 25/32
6.11.3 20-pin ARM JTAG Header
The SmartRF06EB comes with a standard 20-pin ARM JTAG header [8] (Figure 18), enabling the
user to debug an external target using the XDS100v3 Emulator. The pin-out of the ARM JTAG
header is given in Table 15. Chapter 7 has more information on how to debug an external target
using the XDS100v3 Emulator onboard the SmartRF06EB.
Figure 18
– 20-pin ARM JTAG header (P409)
Pin
Signal
Description
EB signal name
XDS
bypass
header
P409.1
VTRef
Voltage reference
VDD_SENSE
P408.19-20
P409.2
VSupply
Voltage supply
NC
P409.3
nTRST
Test Reset
NC
P409.4
GND
Ground
GND
P409.5
TDI
Test Data In
RF2.17_JTAG_TDI
P408.5-6
P409.6
GND
Ground
GND
P409.7
TMS
Test Mode Select
RF2.4_JTAG_TMS
P408.3-4
P409.8
GND
Ground
GND
P409.9
TCK
Test Clock
RF2.1_JTAG_TCK
P408.1-2
P409.10 GND
Ground
GND
P409.11 RTCK
Return Clock
NC
P409.12 GND
Ground
GND
P409.13 TDO
Test Data Out
RF2.19_JTAG_TDO P408.7-8
P409.14 GND
Ground
GND
P409.15 nSRST
System Reset
RF2.15_RESET
¯¯¯¯¯¯¯¯¯¯¯¯¯
P408.9-10
P409.16 GND
Ground
GND
P409.17 DBGRQ
Debug Request
NC
P409.18 GND
Ground
GND
P409.19 DBGACK
Debug Acknowledge
NC
P409.20 GND
Ground
GND
Table 15
– 20-pin ARM JTAG header pin-out (P409)
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